X9251-2.7 INTERSIL [Intersil Corporation], X9251-2.7 Datasheet

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X9251-2.7

Manufacturer Part Number
X9251-2.7
Description
Single Supply/Low Power/256-Tap/SPI Bus
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
Quad Digitally-Controlled (XDCP™)
Potentiometer
FEATURES
• Four potentiometers in one package
• 256 resistor taps–0.4% resolution
• SPI Serial Interface for write, read, and transfer
• Wiper resistance: 100Ω typical @ V
• 4 Non-volatile data registers for each
• Non-volatile storage of multiple wiper positions
• Standby current < 5µA max
• V
• 50kΩ, 100kΩ versions of total resistance
• 100 yr. data retention
• Single supply version of X9250
• Endurance: 100,000 data changes per bit per
• 24 Ld SOIC, 24 Ld TSSOP
• Low power CMOS
• Pb-free plus anneal available (RoHS compliant)
FUNCTIONAL DIAGRAM
operations of the potentiometer
potentiometer
register
HOLD
SCK
CC
SO
CS
A1
A0
SI
: 2.7V to 5.5V Operation
Interface
SPI
V
V
CC
SS
INTERFACE
POWER UP,
CONTROL
STATUS
®
AND
1
Data Sheet
WP
CC
= 5V
WCR0
DR00
DR01
DR02
DR03
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
R
W0
DCP0
R
R
L0
H0
Single Supply/Low Power/256-Tap/SPI Bus
DESCRIPTION
The X9251 integrates four digitally controlled potentio-
meters (XDCP) on a monolithic CMOS integrated
circuit.
The digitally controlled potentiometers are imple-
mented with a combination of resistor elements and
CMOS switches. The position of the wipers are
controlled by the user through the SPI bus interface.
Each potentiometer has associated with it a volatile
Wiper Counter Register (WCR) and four non-volatile
Data Registers that can be directly written to and read
by the user. The content of the WCR controls the
position of the wiper. At power-up, the device recalls
the content of the default Data Registers of each DCP
(DR00, DR10, DR20, and DR30) to the corresponding
WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
WCR1
DR10
DR11
DR12
DR13
September 14, 2005
R
All other trademarks mentioned are the property of their respective owners.
W1
DCP1
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
R
R
L1
H1
WCR2
DR20
DR21
DR22
DR23
R
W2
DCP2
R
R
H2
L2
WCR3
DR30
DR31
DR32
DR33
R
W3
DCP3
X9251
FN8166.2
R
R
H3
L3

Related parts for X9251-2.7

X9251-2.7 Summary of contents

Page 1

... SS 1 Single Supply/Low Power/256-Tap/SPI Bus September 14, 2005 DESCRIPTION The X9251 integrates four digitally controlled potentio- meters (XDCP monolithic CMOS integrated circuit. The digitally controlled potentiometers are imple- mented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the SPI bus interface ...

Page 2

... X9251TV24IZ (Note) X9251TV Z I X9251US24-2.7* X9251US F X9251US24Z-2.7* (Note) X9251US Z F X9251US24I-2.7* X9251US G X9251US24IZ-2.7* (Note) X9251US Z G X9251UV24-2.7 X9251UV F X9251UV24Z-2.7 (Note) X9251UV Z F X9251UV24I-2.7 X9251UV G X9251UV24IZ-2.7 (Note) X9251UV Z G X9251TS24-2.7* X9251TS F X9251TS24Z-2.7* (Note) X9251TS Z F X9251TS24I-2.7* X9251TS G X9251TS24IZ-2.7* (Note) X9251TS Z G X9251TV24-2.7 X9251TV F X9251TV24Z-2 ...

Page 3

... Control the operating point for sensors in industrial systems • Trim offset and gain errors in artificial intelligent systems 3 X9251 PIN CONFIGURATION SOIC/TSSOP X9251 PIN ASSIGNMENTS Pin (SOIC) Symbol 1 SO ...

Page 4

... A match in the slave address serial data stream must be made with the address input in order to initiate communication with the X9251. Device pins must be tie to a logic level which specify the internal address of the device, see Figures and 6. ...

Page 5

... Finally loaded with the contents of its Data Register zero (DR#0) upon power-up. (See Figure 1.) The wiper counter register is a volatile register; that is, its contents are lost when the X9251 is powered-down. Although the register is automatically loaded with the value in DR#0 upon power-up, this may be different ...

Page 6

... The first byte sent to the X9251 from the host, following a CS going HIGH to LOW, is called the Identification Byte. The most significant four bits of the Identification Byte are a Device Type Identifier, ID[3:0]. For the X9251, this is fixed as 0101 (refer to Table 3). Table 3. Identification Byte Format Device Type Identifier ...

Page 7

... Wiper Counter Register XFR Wiper Counter 1 Register to Data Register Global XFR Data Registers 0 to Wiper Counter Registers Global XFR Wiper Counter 1 Registers to Data Register Increment/Decrement 0 Wiper Counter Register Note: 1/0 = data is one or zero 7 X9251 Instruction Set ...

Page 8

... Register instruction is the only unique format (See Figure 5). Four instructions require a two-byte sequence to complete. These instructions transfer data between the host and the X9251; either between the host and one of the data registers or directly between the host and the Wiper Counter Register. These instructions are: ...

Page 9

... Internal Device ID Address Figure 4. Three-Byte Instruction Sequence SPI Interface, Read Case CS SCK ID3 ID2 ID1 ID0 Internal Device ID Address S0 9 X9251 Instruction Internal Opcode Address Instruction Register ...

Page 10

... Figure 6. Increment/Decrement Instruction Sequence CS SCK ID3 ID2 ID1 ID0 Device ID Internal Address Figure 7. Increment/Decrement Timing Spec SCK INC/DEC CMD ISSUED 10 X9251 Instruction Register Pot/WCR Opcode Address Address ...

Page 11

... WPx refers to wiper position data in the Counter Register (2) “I”: stands for the increment operation, SI held HIGH during active SCK phase (high). (3) “D”: stands for the decrement operation, SI held LOW during active SCK phase (high). 11 X9251 Instruction WCR Opcode Addresses (Sent by X9251 on SO ...

Page 12

... Opcode Addresses Rising Edge 0 Instruction DR and WCR CS Opcode Addresses Rising Edge 0 Instruction WCR Increment/Decrement Opcode Addresses (Sent by Master on SI) Instruction WCR Opcode Addresses (Sent by X9251 on SO) 0 HIGH-VOLTAGE WRITE CYCLE HIGH-VOLTAGE WRITE CYCLE CS Rising Edge . . . . I/D I/D Data Byte CS Rising Edge WIP September 14, 2005 FN8166 ...

Page 13

... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Max. Device +70°C X9251 +85°C X9251-2.7 Limits Min. Typ. 100 50 Pin -120 ...

Page 14

... Notes: (6) This parameter is not 100% tested (7) t and t are the delays required from the time the (last) power supply (V PUR PUW These parameters are periodically sampled and not 100% tested. 14 X9251 (Over the recommended operating conditions unless otherwise specified.) Limits Min. Typ. Max. 400 1 ...

Page 15

... HOLD low to output in high HOLD high to output in low Noise suppression time constant at SI, SCK, HOLD and CS inputs deselect time CS t WP, A0 setup time WPASU t WP, A0 hold time WPAH 15 X9251 R H 10pF 10pF Parameter SPICE Macromodel R TOTAL 10pF ...

Page 16

... WAVEFORM INPUTS Must be steady May change from Low to High May change from High to Low Don’t Care: Changes Allowed N/A 16 X9251 Parameter Parameter OUTPUTS Will be steady Will change from Low to High Will change from High to Low Changing: State Not Known Center Line ...

Page 17

... TIMING DIAGRAMS Input Timing CS t LEAD SCK MSB SI High Impedance SO Output Timing CS SCK t V MSB SO ADDR SI Hold Timing CS SCK HOLD 17 X9251 t CYC ... ... ... t HO ... t t HSU HH ... HOLD LAG t RI LSB t DIS ...

Page 18

... XDCP Timing (for All Load Instructions) CS SCK MSB SI VWx High Impedance SO Write Protect and Device Address Pins Timing X9251 ... t WRL ... (Any Instruction WPAH WPASU LSB FN8166.2 September 14, 2005 ...

Page 19

... Offset Voltage Adjustment 100kΩ – + TL072 10kΩ 10kΩ 10kΩ +12V -12V 19 X9251 Comparator with Hysterisis Two terminal Variable Resistor; Variable current Voltage Regulator 317 V ...

Page 20

... G ≤ +1/2 Inverting Amplifier – Function Generator – + frequency ∝ amplitude ∝ X9251 10kΩ Filter – ...

Page 21

... BSC .303 (7.70) .311 (7.90) .0075 (.19) .0118 (.30) 0° - 8° .020 (.50) .030 (.75) Detail A (20X) See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 21 X9251 24-Lead Plastic, TSSOP, Package Code V24 .169 (4.3) .252 (6.4) BSC .177 (4.5) .047 (1.20) .002 (.06) .005 (.15) .010 (.25) Gage Plane Seating Plane (1.78) (0 ...

Page 22

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 22 X9251 24-Lead Plastic, SOIC, Package Code S24 Pin 1 0.014 (0.35) ...

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