XCV405E-7BG556I XILINX [Xilinx, Inc], XCV405E-7BG556I Datasheet - Page 74

• Manufacturer Part Number: XCV405E-7BG556I
• Description: Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
• Manufacturer: XILINX [Xilinx, Inc]

Virtex™-E 1.8 V Extended Memory Field Programmable Gate Arrays
Revision History
The following table shows the revision history for this document.
Virtex-E Extended Memory Data Sheet
The Virtex-E Extended Memory Data Sheet contains the following modules:
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Module 3 of 4
20
03/23/00
08/01/00
09/19/00
11/20/00
04/02/01
04/19/01
07/23/01
07/26/01
09/18/01
10/25/01
11/09/01
02/01/02
07/17/02
DS025-1, Virtex-E 1.8V Extended Memory FPGAs:
Introduction and Ordering Information (Module 1)
DS025-2, Virtex-E 1.8V Extended Memory FPGAs:
Functional Description (Module 2)
Date
Version
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
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Initial Xilinx release.
Accumulated edits and fixes. Upgrade to Preliminary. Preview -8 numbers added.
Reformatted to adhere to corporate documentation style guidelines. Minor changes in
BG560 pin-out table.
In Table 3 (Module 4), FG676 Fine-Pitch BGA — XCV405E, the following pins are no
longer labeled as VREF: B7, G16, G26, W26, AF20, AF8, Y1, H1.
Min values added to Virtex-E Electrical Characteristics tables.
Updated speed grade -8 numbers in Virtex-E Electrical Characteristics tables
(Module 3).
Updated minimums in Table 11 (Module 2), and added notes to Table 12 (Module 2).
Added to note 2 of Absolute Maximum Ratings (Module 3).
Changed all minimum hold times to –0.4 for Global Clock Set-Up and Hold for LVTTL
Standard, with DLL (Module 3).
Revised maximum T
In
and pin G16 is now labeled as VREF.
Updated values in
Converted data sheet to modularized format. See the
Sheet
Updated values in
Under
Changes made to SSTL symbol names in
Adjustments
Removed T
Reworded power supplies footnote to
Updated the speed grade designations used in data sheets, and added
shows the current speed grade designation for each device.
Updated
Updated the XCV405E device speed grade designation to Preliminary in
Updated
Updated footnotes to the
and Phase Information
Data sheet designation upgraded from Preliminary to Production.
Removed mention of MIL-M-38510/605 specification.
Added link to xapp158 from the
Table
section.
Absolute Maximum
4, FG676 Fine-Pitch BGA — XCV405E, pin B19 is no longer labeled as VREF,
Power-On Power Supply Requirements
Power-On Power Supply Requirements
SOL
table.
parameter and added footnote to
Virtex-E Switching Characteristics
Virtex-E Switching Characteristics
www.xilinx.com
1-800-255-7778
DLLPW
tables.
DC Input and Output Levels
Ratings, changed (T
in -6 speed grade for DLL Timing Parameters (Module 3).
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Power-On Power Supply Requirements
DS025-3, Virtex-E 1.8V Extended Memory FPGAs:
DC and Switching Characteristics (Module 3)
DS025-4, Virtex-E 1.8V Extended Memory FPGAs:
Pinout Tables (Module 4)
Revision
Absolute Maximum Ratings
IOB Input Switching Characteristics Standard
SOL
table.
table.
Absolute Maximum Ratings
) to 220 °C .
tables.
tables.
Virtex-E Extended Memory Data
and
DLL Clock Tolerance, Jitter,
DS025-3 (v2.2) July 17, 2002
table.
Table
section.
Table
table.
1, which
1.
R