MK61FN1M0VMD12 FREESCALE [Freescale Semiconductor, Inc], MK61FN1M0VMD12 Datasheet - Page 31

• Manufacturer Part Number: MK61FN1M0VMD12
• Description: K61 Sub-Family Data Sheet
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

1. This parameter is measured with the internal reference (slow clock) being used as a reference to the FLL (FEI clock
2. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32=0.
3. The resulting system clock frequencies should not exceed their maximum specified values. The DCO frequency deviation
4. These typical values listed are with the slow internal reference clock (FEI) using factory trim and DMX32=1.
5. The resulting clock frequency must not exceed the maximum specified clock frequency of the device.
6. This specification applies to any time the FLL reference source or reference divider is changed, trim value is changed,
7. Excludes any oscillator currents that are also consuming power while PLL is in operation.
8. This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL disabled
9. Accumulated jitter will depend on VCO frequency and VDIV.
6.3.2 Oscillator electrical specifications
This section provides the electrical characteristics of the module.
6.3.2.1 Oscillator DC electrical specifications
Freescale Semiconductor, Inc.
Symbol
Symbol
I
t
J
J
DDOSC
pll_lock
mode).
(Δf
DMX32 bit is changed, DRS bits are changed, or changing from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE,
FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running.
(BLPE, BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this specification assumes
it is already running.
acc_pll
cyc_pll
V
I
pll
DD
dco_t
) over voltage and temperature should be considered.
PLL operating current (fast)
Lock detector detection time
Jitter (cycle to cycle)
Jitter (accumulated)
Supply voltage
Supply current — low-power mode (HGO=0)
Description
Description
• 32 kHz
• 4 MHz
• 8 MHz (RANGE=01)
• 16 MHz
• 24 MHz
• 32 MHz
Table 15. Oscillator DC electrical specifications
K61 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
Table 14. MCG specifications (continued)
Table continues on the next page...
Preliminary
1.71
Min.
Min.
—
—
—
—
—
—
—
—
—
—
Peripheral operating requirements and behaviors
TBD
Typ.
Typ.
500
500
200
300
950
1.2
1.5
50
—
—
100 × 10
+ 1075(1/
f
Max.
pll_ref
TBD
TBD
Max.
3.6
—
—
—
—
—
—
—
)
-6
Unit
Unit
mA
mA
µA
μA
μA
μA
nA
ps
ps
V
s
Notes
Notes
7
8
9
1
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