CY8C20110_12 CYPRESS [Cypress Semiconductor], CY8C20110_12 Datasheet - Page 7

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CY8C20110_12

Manufacturer Part Number
CY8C20110_12
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Typical Circuits
Document Number: 001-54606 Rev. *G
Notes
8. 1.8 V  VDD_I2C  VDD_CE and 2.4 V  VDD_CE  5.25 V.
9. The I2C drive mode of the CapSense device should be configured properly before using in an I2C environment with external pull-ups. Please refer to I2C_ADDR_DM
10. For low power requirements, if V
register and its factory setting.
should be from the same source such that turning off the V
driven high by the master in this situation. If a port pin or group of port pins of the master can cater to the power supply requirements of the circuit, the LDO can be
avoided.
Figure 7. Circuit 4 – Powering Down CapSense Express Device for Low Power Requirements
Master
Host
Or
Output
enable
(continued)
DD
is to be turned off, this concept can be used. The requirement is that the V
Figure 6. Circuit 3 – Compatibility with 1.8 V I
LDO
CapSense Express
DD
Output
ensures that no signal is applied to the device while it is unpowered. The I
VDD
SDA
SCL
LED
2
C Signaling
DDs
CY8C20160, CY8C20140
CY8C20110, CY8C20180
of CapSense Express, I
I2C Pull
[8, 9]
UPs
2
C signals should not be
2
CY8C20142
C pull-ups, and LEDs
[10]
BUS
I2C
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