CY8C20111_11 CYPRESS [Cypress Semiconductor], CY8C20111_11 Datasheet - Page 10
CY8C20111_11
Manufacturer Part Number
CY8C20111_11
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20111_11.pdf
(43 pages)
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8.1 OUTPUT_STATUS
OUTPUT_STATUS: 00h
The Output Status register represents the actual logical levels on the output pins.
8.2 OUTPUT_PORT
OUTPUT_PORT: 04h
This register is used to write data to DIG output port. Pins defined as output of combinational logic (in OP_SEL_x register) cannot be
changed using this register.
8.3 CS_ENABLE
CS_ENABLE: 07h
(
Document Number: 001-53516 Rev. *G
Bit
1:0
Bit
1:0
Writable only in Setup mode)
Access: FD
Access: FD
Access: FD
Access: FD
Access: FD
Access: FD
1 Button
Bit Name
2 Button
Bit Name
1 Button
Bit Name
2 Button
Bit Name
1 Button
Bit Name
2 Button
Bit Name
Output Status Register
Output Port Register
Select CapSense Input Register
Name
STS [1:0]
Name
DIG [1:0]
7
7
7
7
7
7
6
6
6
6
6
6
5
5
5
5
5
5
Description
Used to represent the output status
0
1
Description
A bit set in this register sets the logic level of the output.
0
1
4
4
4
4
4
4
Output low
Output high
Logic ‘0’
Logic ‘1’
3
3
3
3
3
3
2
2
2
2
2
2
CY8C20111, CY8C20121
1
1
1
1
1
1
STS[1:0]
DIG[1:0]
CS[1:0]
RW:03
W:03
R:03
STS[0]
DIG[0]
RW:01
CS[0]
W:01
R:01
0
0
0
0
0
0
Page 10 of 43
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