CY8C20111_11 CYPRESS [Cypress Semiconductor], CY8C20111_11 Datasheet - Page 41

• Manufacturer Part Number: CY8C20111_11
• Manufacturer: CYPRESS [Cypress Semiconductor]

20. Glossary
Document Number: 001-53516 Rev. *G
tri-state
UART
user modules
user space
V
V
watchdog timer
DD
SS
(continued)
A function whose output can adopt three states: 0, 1, and Z (high-impedance). The function does
not drive any value in the Z state and, in many respects, may be considered to be disconnected
from the rest of the circuit, allowing another output to drive the same net.
A UART or universal asynchronous receiver-transmitter translates between parallel bits of data
and serial bits.
Pre-build, pre-tested hardware/firmware peripheral functions that take care of managing and
configuring the lower level Analog and Digital PSoC Blocks. User Modules also provide high
level API (Application Programming Interface) for the peripheral function.
The bank 0 space of the register map. The registers in this bank are more likely to be modified
during normal program execution and not just during initialization. Registers in bank 1 are most
likely to be modified only during the initialization phase of the program.
A name for a power net meaning "voltage drain." The most positive power supply signal. Usually
5 V or 3.3 V.
A name for a power net meaning "voltage source." The most negative power supply signal.
A timer that must be serviced periodically. If it is not serviced, the CPU resets after a specified
period of time.
CY8C20111, CY8C20121
Page 41 of 43
[+] Feedback