XE8805 SEMTECH [Semtech Corporation], XE8805 Datasheet - Page 144

• Manufacturer Part Number: XE8805
• Description: Data Acquisition MCU
• Manufacturer: SEMTECH [Semtech Corporation]

20.5 Block schematic
20.6
Counters are enabled by CntAEnable, CntBEnable, CntCEnable, and CntDEnable in RegCntOn.
To stop the counter X, CntXEnable must be reset. To start the counter X, CntXEnable must be set. When
counters are cascaded, CntAEnable and CntCEnable also control respectively the counters B and D.
In the control registers, all registers must be written in this order: RegCntCtrlCk, RegCntConfig1, RegCntConfig2
and all RegCntX because several bits have no default values at reset.
All counters have a corresponding 8-bit read/write register: RegCntA, RegCntB, RegCntC, and RegCntD. When
read, these registers contain the counter value (or the captured counter value). When written, they modify the
counter comparison values.
For a correct acquisition of the counter value, use one of the three following methods:
© Semtech 2006
ckrcext/4
ckrcext
ck128
ck32k
PA(0)
PA(1)
PA(2)
PA(3)
ck1k
1) Stop the concerned counter, perform the read operation and restart the counter. While stopped, the
General counter registers operation
counter content is frozen and the counter does not take into account the clock edges delivered on the
external pin.
Figure 20-1: Counters/timers block schematic
RegCntB (write)
RegCntC (write)
RegCntD (write)
RegCntA (write)
Counter B
Counter C
Counter D
Counter A
20-4
PWM
Capture
ck1k
ck32k
RegCntA (read)
RegCntB (read)
RegCntC (read)
RegCntD (read)
PB(0)
PB(1)
XE8805/05A
www.semtech.com