CP3UB17G38 NSC [National Semiconductor], CP3UB17G38 Datasheet - Page 191

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CP3UB17G38

Manufacturer Part Number
CP3UB17G38
Description
CP3UB17 Reprogrammable Connectivity Processor with USB Interface
Manufacturer
NSC [National Semiconductor]
Datasheet
26.15
Symbol Figure
t
t
t
t
t
t
t
t
t
t
t
t
t
10
11
12
13
1
2
3
4
5
6
7
8
9
EXTERNAL BUS TIMING
80, 81
80, 81
77, 78
80, 81
80, 81
77, 78
77, 78 Minimum Delay Time
80, 81
77, 78
77,
79,
77,
79,
77,
78,
79,
77,
78,
79,
77,
78,
79,
79
77
77
78
Input Setup Time
D[15:0]
Output Hold Time
D[15:0]
Output Valid Time
D[15:0]
Output Valid Time
A[21:0] (CP3BT10)
A[22:0] (CP3BT13)
Output Active/Inactive Time
RD
SEL[1:0]
SELIO
Output Active/Inactive Time
WR[1:0]
Minimum Inactive Time
RD
Output Float Time
D[15:0]
Minimum Delay Time
Minimum Delay Time
Output Hold Time
A22 (CP3BT13 only)
A[21:0]
D[15:0]
RD
SEL[2:0]
SELIO
Output Hold Time
WR[1:0]
Description
Table 64 External Bus Signals
External Bus Output Signals
External Bus Input Signals
Before Rising Edge (RE)
on CLK
After RE on CLK
After RE on CLK
After RE on CLK
After RE on CLK
After RE on CLK
At 2.0V
After RE on CLK
From RD Trailing Edge
(TE) to D[15:0] driven
From RD TE to SELn
Leading Edge (LE)
From SELx TE to SELy LE
After RE on CLK
After RE on CLK
191
Reference
0.5 Tclk - 3
Min (ns)
Tclk - 4
Tclk - 4
8
0
0
0
0
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0.5 Tclk + 8
Max (ns)
8
8
8
8

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