MPC8270 MOTOROLA [Motorola, Inc], MPC8270 Datasheet - Page 34

• Manufacturer Part Number: MPC8270
• Description: PowerQUICC II Family Hardware Specifications
• Manufacturer: MOTOROLA [Motorola, Inc]

1
2
3
4
5
6
As Table 14 shows, PCI_MODCK determines the PCI clock frequency range. Refer to Table 16 for higher configurations.
MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.
60x and local bus frequency. Identical to CLKIN.
CPM multiplication factor = CPM clock/bus clock
CPU multiplication factor = Core PLL multiplication factor
“Low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency guarantees the
required minimum CPU operating frequency. Minimum CPU frequency is determined by the clock mode.
For modes with a CPU multiplication factor ≤ 3, the minimum CPU frequency is 166 MHz. The minimum CPM frequency
is 133 MHz.
For modes with a CPU multiplication factor ≥ 3.5, the minimum CPU frequency is 250 MHz. The minimum CPM frequency
is as shown in the table.
“High” values are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting
configuration does not exceed the frequency rating of the user’s device.
7.3
Table 18 and Table 19 show configurations for PCI agent mode. The frequencies listed are for the purpose
of illustration only. Users must select a mode and input bus frequency so that the resulting configuration
does not exceed the frequency rating of the user’s device. In addition, note the following:
MODCK[1-3]
34
MODCK_H-
0000_000
0000_001
0000_010
0000_011
0000_100
0000_101
0000_110
0000_111
0001_001
Mode
3
PCI Agent Mode
66.7 66.7
66.7 66.7
55.5 66.7
62.5 66.7
50.0 66.7
59.5 66.7
53.6 66.7
50.0 66.7
PCI Clock
Table 18. Clock Configurations for PCI Agent Mode (PCI_MODCK=0)
low high
In PCI mode only, PCI_MODCK comes from the LGPL5 pin and
MODCK_H[0–3] comes from {LGPL0, LGPL1, LGPL2, LGPL3}.
The minimum Tval = 2 when PCI_MODCK = 1, and the minimum
Tval = 1 when PCI_MODCK = 0. Therefore, designers should use clock
configurations that fit this condition to achieve PCI-compliant AC timing.
(MHz)
MPC8280 PowerQUICC II™ Family Hardware Specifications
Multiplication
Factor
CPM
2
2
3
3
3
3
4
4
4
Default Modes (MODCK_H=0000
NOTE: Tval (Output Hold)
133.3 133.3
133.3 133.3
166.7 200.0
187.5 200.0
150.0 200.0
178.6 200.0
214.3 266.6
200.0 266.6
Full Configuration Modes
CPM Clock
NOTE: PCI_MODCK
low
(MHz)
high
Multiplication
Reserved
Factor
CPU
2.5
3.5
3.5
3
3
4
3
3
5
166.7 166.7
200.0 200.0
166.7 200.0
250.0 266.6
180.0 240.0
250.0 280.0
250.0 311.1
240.0 320.0
CPU Clock
low
(MHz)
high
Division
Factor
Bus
2.5
2.5
2.5
2
2
3
3
3
1,2
MOTOROLA
66.7
66.7
55.5
62.5
60.0
71.4
71.4
80.0 106.7
Bus Clock
low
(MHz)
high
66.7
66.7
66.7
66.7
80.0
80.0
88.9