PIC12F1516 MICROCHIP [Microchip Technology], PIC12F1516 Datasheet - Page 121

• Manufacturer Part Number: PIC12F1516
• Description: 28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

REGISTER 12-9:
REGISTER 12-10: WPUB: WEAK PULL-UP PORTB REGISTER
TABLE 12-6:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
Note 1:
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
Note 1:
ANSELB
APFCON
LATB
OPTION_REG
PORTB
TRISB
WPUB
Legend:
R/W-1/1
WPUB7
Name
U-0
—
2:
When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to allow external
control of the voltage on the pin.
Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTB.
Unimplemented: Read as ‘0’
ANSB<5:0> : Analog Select between Analog or Digital Function on pins RB<5:0>, respectively
0 = Digital I/O. Pin is assigned to port or digital special function.
1 = Analog input. Pin is assigned as analog input
WPUB<7:0> : Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
WPUEN
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
TRISB7
WPUB7
LATB7
Bit 7
R/W-1/1
RB7
WPUB6
—
—
U-0
—
ANSELB: PORTB ANALOG SELECT REGISTER
INTEDG
TRISB6
WPUB6
LATB6
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
RB6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
—
—
R/W-1/1
ANSB5
R/W-1/1
WPUB5
TMR0CS
WPUB5
TRISB5
ANSB5
LATB5
Bit 5
RB5
—
R/W-1/1
R/W-1/1
WPUB4
ANSB4
Preliminary
TMR0SE
TRISB4
WPUB4
ANSB4
LATB4
Bit 4
RB4
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
(1)
R/W-1/1
WPUB3
R/W-1/1
. Digital input buffer disabled.
ANSB3
WPUB3
TRISB3
ANSB3
LATB3
Bit 3
PSA
PIC16(L)F1516/7/8/9
RB3
—
WPUB2
TRISB2
ANSB2
LATB2
Bit 2
R/W-1/1
WPUB2
RB2
R/W-1/1
ANSB2
—
PS<2:0>
WPUB1
TRISB1
ANSB1
SSSEL
LATB1
Bit 1
RB1
R/W-1/1
R/W-1/1
ANSB1
WPUB1
CCP2SEL
TRISB0
WPUB0
ANSB0
LATB0
DS41452B-page 121
Bit 0
RB0
R/W-1/1
ANSB0
R/W-1/1
WPUB0
Register
on Page
121
120
157
120
120
121
114
bit 0
bit 0