DP83256VF-AP NSC [National Semiconductor], DP83256VF-AP Datasheet - Page 76

• Manufacturer Part Number: DP83256VF-AP
• Manufacturer: NSC [National Semiconductor]

D0-D5
D6
D7
5 0 Registers
5 32 CMT CONDITION COMPARISON REGISTER (CMTCCR)
The CMT Condition Comparison Register (CMTCR) ensures that the Control Bus must first read a bit modified by the PLAYER
device before it can be written to by the Control Bus Interface
The current state of the CMT Condition Register (CMTCR) is automatically written into the CMT Condition Comparison Register
(CMTCR) (i e CMTCCR
During a Control Bus Interface write cycle the PLAYER
Control Register (ICR) to 1 and disallow the setting or clearing of a bit within the CMTCR when the value of a bit in the CMTCR
differs from the value of the corresponding bit in the CMT Condition Comparison Register
ACCESS RULES
Bit
TCOC
D7
ADDRESS
RES
STEC
TCOC
Symbol
1Fh
STEC
D6
RESERVED Reserved for future use
SCRUB TIMER EXPIRED COMPARISON The comparison bit for the Scrub Timer Expire bit (STE) of the CMT
Condition Register (CMTCR)
TRIGGER CONDITION OCCURRED COMPARISON The comparison bit for the Trigger Condition Occurred
(TCO) bit of the CMT Condition Register (CMTCR)
(Continued)
e
CMTCR) during a Control Bus Interface read-cycle of CMTCR
Always
READ
RES
D5
RES
D4
WRITE
Always
a
RES
device will set the Conditional Write Inhibit bit (CWI) of the Interrupt
D3
76
Description
RES
D2
RES
D1
RES
D0
a