DP83256VF-AP NSC [National Semiconductor], DP83256VF-AP Datasheet - Page 83

• Manufacturer Part Number: DP83256VF-AP
• Manufacturer: NSC [National Semiconductor]

D0 D1
D2 D3
D4 D5
D6
D7
5 0 Registers
5 39 TRIGGER TRANSITION CONFIGURATION REGISTER (TTCR)
The Trigger Transition Configuration Register holds the configuration switch setting to be loaded into the Configuration Register
(CR) when a trigger transition takes place When scrubbing is enabled scrubbing is performed for a period of time indicated by
the Scrub Timer Threshold Register (STTR) The register bit descriptions for the Configuration Register and therefore the
Trigger Transition Configuration Register are reprinted below
ACCESS RULES
Bit
BIE
D7
ADDRESS
AIS0 AIS1
BIS0 BIS1
TRS0 TRS1
AIE
BIE
27h
Symbol
AIE
D6
(Continued)
A INDICATE SELECTOR
Configuration Switch data buses for the A Indicate output port (AIP AIC AID
AIS1
0
0
1
1
B INDICATE SELECTOR
Configuration Switch data buses for the B Indicate output port (BIP BIC BID
BIS1
0
0
1
1
Note Even though this bit can be set and or cleared in the DP83256 (for single path stations) it will not affect any I Os since the
TRANSMIT REQUEST SELECTOR
the four Configuration Switch data buses for the input to the Transmitter Block
TRS1
0
0
1
1
Note If the PLAYER
A INDICATE ENABLE
0 Disables the A Indicate output port The A Indicate port pins will be tri-stated when the port is
1 Enables the A Indicate output port (AIP AIC AID
B INDICATE ENABLE
0 Disables the B Indicate output port The B Indicate port pins will be tri-stated when the port is
1 Enables the B Indicate output port (BIP BIC BID
Note Even though this bit can be set and or cleared in the DP83256 (for single path stations) it will not affect any I Os since the
disabled
disabled
Always
READ
DP83256 does not offer a B Indicate port
Register (CTSR) are set to 00) and the PHY Invalid Bus is selected then the PLAYER
symbols due to the Repeat Filter
DP83256 does not offer a B Indicate port
TRS1
AIS0
0
1
0
1
BIS0
0
1
0
1
TRS0
0
1
0
1
D5
a
PHY Invalid Bus
Receiver Bus
A Request Bus
B Request Bus
PHY Invalid Bus
Receiver
A Request Bus
B Request Bus
PHY Invalid Bus
Receiver Bus
A Request Bus
B Request Bus
device is in Active Transmit Mode (i e the Transmit Mode bits (TM
TRS0
D4
WRITE
Always
k
k
0 1
0 1
l
l
BIS1
D3
k
The B Indicate Selector
The A Indicate Selector
0 1
83
l
The Transmit Request Selector
Description
BIS0
D2
k
k
7 0
7 0
l
l
)
)
AIS1
k
k
D1
0 1
0 1
l
l
bits selects one of the four
bits selects one of the four
k
2 0
a
device will transmit continuous Idle
l
AIS0
D0
) of the Current Transmit State
k
k
k
0 1
7 0
7 0
l
l
l
)
)
bits selects one of