MC68HC08AZ60CFU MOTOROLA [Motorola, Inc], MC68HC08AZ60CFU Datasheet - Page 170

• Manufacturer Part Number: MC68HC08AZ60CFU
• Description: Advance Information
• Manufacturer: MOTOROLA [Motorola, Inc]

External Interrupt Module (IRQ)
IRQ Module During Break Interrupts
MC68HC08AZ60 — Rev 1.0
170
NOTE:
The IRQF bit in the ISCR register can be used to check for pending
interrupts. The IRQF bit is not affected by the IMASK1 bit, which makes
it useful in applications where polling is preferred.
Use the BIH or BIL instruction to read the logic level on the IRQ pin.
When using the level-sensitive interrupt trigger, avoid false interrupts by
masking interrupt requests in the interrupt routine.
The system integration module (SIM) controls whether the IRQ interrupt
latch can be cleared during the break state. The BCFE bit in the SIM
break flag control register (SBFCR) enables software to clear the latches
during the break state. (See
103
To allow software to clear the IRQ latch during a break interrupt, write a
logic 1 to the BCFE bit. If a latch is cleared during the break state, it
remains cleared when the MCU exits the break state.
To protect the latch during the break state, write a logic 0 to the BCFE
bit. With BCFE at logic 0 (its default state), writing to the ACK1 bit in the
IRQ status and control register during the break state has no effect on
the IRQ latch.
Freescale Semiconductor, Inc.
For More Information On This Product,
External Interrupt Module (IRQ)
Go to: www.freescale.com
SIM Break Flag Control Register
MOTOROLA
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6-irq