MC68HC08AZ60CFU MOTOROLA [Motorola, Inc], MC68HC08AZ60CFU Datasheet - Page 294

• Manufacturer Part Number: MC68HC08AZ60CFU
• Description: Advance Information
• Manufacturer: MOTOROLA [Motorola, Inc]

I/O Ports
Data Direction
Register E
MC68HC08AZ60 — Rev 1.0
294
NOTE:
NOTE:
Address:
TxD — SCI Transmit Data Output
Data direction register E (DDRE) does not affect the data direction of
port E pins that are being used by the SCI module. However, the DDRE
bits always determine whether reading port E returns the states of the
latches or the states of the pins. (See
Data direction register E determines whether each port E pin is an input
or an output. Writing a logic 1 to a DDRE bit enables the output buffer for
the corresponding port E pin; a logic 0 disables the output buffer.
DDRE[7:0] — Data Direction Register E Bits
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
Figure 16
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
The PTE0/TxD pin is the transmit data output for the SCI module.
When the enable SCI bit, ENSCI, is clear, the SCI module is disabled,
and the PTE0/TxD pin is available for general-purpose I/O. (See
Control Register 1
These read/write bits control port E data direction. Reset clears
DDRE[7:0], configuring all port E pins as inputs.
For More Information On This Product,
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
DDRE7
$000C
Bit 7
0
shows the port E I/O logic.
Figure 15. Data Direction Register E (DDRE)
Go to: www.freescale.com
DDRE6
6
0
I/O Ports
on page 194).
DDRE5
5
0
DDRE4
4
0
Table
DDRE3
3
0
5).
DDRE2
2
0
DDRE1
1
0
MOTOROLA
DDRE0
16-ioports
Bit 0
0
SCI