MPC2F35E2 MEGAWIN [Megawin Technology Co., Ltd], MPC2F35E2 Datasheet - Page 12

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MPC2F35E2

Manufacturer Part Number
MPC2F35E2
Description
Low-speed USB micro-controller
Manufacturer
MEGAWIN [Megawin Technology Co., Ltd]
Datasheet
General Purpose I/O Ports
Port 0
Port 0 is an 8-bit I/O port; each pin can be programmed as input or output individually.
At initial reset, Port 0 is all in the input mode. Each pin of Port 0 can be specified as the input or output
mode independently by the P0_CR SFR. When Port 0 is used as the output port, CMOS or NMOS
open drain output type can be selected by the P0_MR register. Port 0 has 17k ohm internal pull-high
resistors that can be enabled/disabled by specifying the MP00 and MP04 in the P0_MR register
respectively. The pull-high resistor is automatically disabled only when the port is configured as CMOS
output. Schmitt trigger circuit is added in the input path of P0.0~P0.3. User should be carefully on
setting pin as input with no pull high resistor since this setting has potential to cause leakage.
When P0.4 and P0.5 are set as input pins, they are INT0 and INT1 interrupt sources. A falling edge at
the two pins will set the corresponding bits in the IRQ_ST register to 1, and the external interrupt
subroutines will be executed if the corresponding bits in the IRQ_EN register are also set.
Port 1
12
Address
00D0H
00D8H
0240H
0241H
P0_BUF: Port 0 output buffer. When P0.n is configured as an output pin, it outputs the content
P0: Values on the pin of Port 0 while reading from Port 0.
P0_CR: Configure P0.0 ~ P0.7 to be input or output individually. 0: Input (default), 1: Output
P0_MR: Configure the output mode of P0.0 ~ P0.7 with a 17k ohm pull-high resistor, CMOS or
TM0
FFH
00H
01H
02H
MP00 (P0_MR.0): P0.0 ~ P0.3 with the pull-high control bit, 0: Disable (default), 1:Enable
MP01 (P0_MR.1): P0.0 ~ P0.3 with the CMOS or NMOS selector, 0: CMOS (default), 1: NMOS
MP04 (P0_MR.4): P0.4 ~ P0.7 with the pull-high control bit, 0: Disable (default), 1: Enable
MP05 (P0_MR.5): P0.4 ~ P0.7 with the CMOS or NMOS selector, 0: CMOS (default), 1: NMOS
of P0_BUF.n.
NMOS open drain
P0_BUF
P0_MR
P0_CR
Name
P0
F
TM0_UV
93.75 KHz
732.42 Hz
62.5 KHz
Invalid
Frequency
BP07
CP07
Bit 7
P07
-
MPC2F35_USB Data Sheet
BP06
CP06
Bit 6
P06
-
MP05
CP05
BP05
Bit 5
P05
MP04
BP04
CP04
Bit 4
P04
CP03
BP03
Bit 3
P03
-
BP02
CP02
Bit 2
P02
-
MP01
CP01
BP01
Bit 1
P01
MEGAWIN
MP00
BP00
CP00
Bit 0
P00
R
W
-

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