MPC2F35E2 MEGAWIN [Megawin Technology Co., Ltd], MPC2F35E2 Datasheet - Page 27

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MPC2F35E2

Manufacturer Part Number
MPC2F35E2
Description
Low-speed USB micro-controller
Manufacturer
MEGAWIN [Megawin Technology Co., Ltd]
Datasheet
RXCON: Receive FIFO Control Register (Endpoint-Indexed)
Read/Write
Default: 0XX0_XXXX
Number
MEGAWIN
Bit
7
6
5
4
3
2
1
0
Mnemonic
RXFFRC
RXCLR
Bit
-
-
-
-
-
-
Receive FIFO Clear:
Set this bit to flush the entire receive FIFO. All FIFO statuses are reverted
to their reset states. Hardware clears this bit when the flush operation is
completed.
Reserved:
Write zero to this bit.
Reserved:
Write zero to this bit.
Receive FIFO Read Complete:
Set this bit to release the receive FIFO when data set read is complete.
Hardware clears this bit after the FIFO release operation has been finished.
Reserved:
Write zero to this bit.
Reserved:
Write zero to this bit.
Reserved:
Write zero to this bit.
Reserved:
Write zero to this bit.
MPC2F35_USB Data Sheet
Function
Address: 24H
System Reset or USB Reset
27

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