DP83936AVF NSC [National Semiconductor], DP83936AVF Datasheet - Page 103

• Manufacturer Part Number: DP83936AVF
• Description: Full Duplex SONICTM-T Systems-Oriented Network Interface Controller with Twisted Pair Interface
• Manufacturer: NSC [National Semiconductor]

10 0 AC Timing Test Conditions
All specifications are valid only if the mandatory isolation is
employed and all differential signals are taken to be at the
AUI side of the pulse transformer
Input Pulse Levels (TTL CMOS)
Input Rise and Fall Times (TTL CMOS)
Input and Output Reference
Input Pulse Levels (Diff )
Input and Output
TRI-STATE Reference Levels
OUTPUT LOAD (See Figure below)
Note 1 50 pF includes scope and jig capacitance
Note 2 S1
Levels (TTL CMOS)
Reference Levels (Diff )
S1
S1
S1
S1
e
e
e
e
e
Impedance measurements
High Impedance measurements
V
Open for timing test for push pull outputs
V
GND for V
GND for High Impedance to active high and active High to
CC
CC
for High Impedance to active low and active low to High
for V
OL
OH
test
test
b
350 mV to
Float ( V)
the Differential
50% Point of
GND to 3 0V
TL F 12597– 86
b
1315 mV
g
1 5V
0 5V
5 ns
103
Pin Capacitance
DERATING FACTOR
Output timing is measured with a purely capacitive load of
50 pF The following correction factor can be used for other
loads C
Note In the above diagram the TX
Symbol
C
C
IN
OUT
AUI side of the isolation (pulse transformer) The pulse transformer
used for all testing is a 100 H
L t
50 pF
Input Capacitance
Output Capacitance
AUI Transmit Test Load
e
Parameter
0 05 ns pF
T
a
A
g
and TX
e
0 1% Pulse Engineering PE64103
25 C f
b
signals are taken from the
e
Typ
http
7
7
1 MHz
TL F 12597 – 87
www national com
Units
pF
pF