DP83936AVF NSC [National Semiconductor], DP83936AVF Datasheet - Page 89

no-image

DP83936AVF

Manufacturer Part Number
DP83936AVF
Description
Full Duplex SONICTM-T Systems-Oriented Network Interface Controller with Twisted Pair Interface
Manufacturer
NSC [National Semiconductor]
Datasheet
Number
T45a
T51a
T52
T53
T54
T54a
T54b
T55
T55b
9 0 AC and DC Specifications
BUS REQUEST TIMING BMODE
Note 1 BGACK is asserted one bus clock after all the signals (AS DSACK0 1 BGACK STERM (Extended bus mode) and BG) meet the T45a setup time (see
Section 5 4 1 for more information) The address bus AS DS ECS MRW USR
Note 2 S
k
2 0
BG AS BGACK DSACK0 1 and STERM Asynchronous
Setup Time to BSCK (Note 1)
BSCK to Address AS MRW DS ECS
USR
BSCK to Data TRI-STATE
BSCK to Address AS MRW DS ECS
USR
BSCK Low to BR Low TRI-STATE
BSCK High to BGACK Low High
High to BGACK TRI-STATE
BSCK to Bus Status Valid
S
l
k
will indicate IDLE at the end of T2 if the last operation is a read operation or at the end of Th if the last operation is a write operation
2 0
k
k
1 0
1 0
l
Hold from BSCK
l
l
and EXUSR
and EXUSR
Parameter
e
k
k
1
3 0
3 0
l
l
TRI-STATE
Active (Note 1)
(Continued)
89
k
1 0
l
and EXUSR
Min
7
3
20 MHz
k
Max
37
34
34
26
24
19
29
3 0
l
will also be driven active on the same clock
Min
6
3
25 MHz
Max
35
32
32
24
22
17
27
Min
5
3
33 MHz
http
Max
33
30
30
22
20
15
25
TL F 12597 – 69
www national com
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for DP83936AVF