PIC18F2423 MICROCHIP [Microchip Technology], PIC18F2423 Datasheet - Page 292
PIC18F2423
Manufacturer Part Number
PIC18F2423
Description
28/40/44-Pin, Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F2423.pdf
(392 pages)
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PIC18F2423/2523/4423/4523
DAW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
DS39755B-page 290
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
W
C
DC
W
C
DC
W
C
DC
W
C
DC
Q1
=
=
=
=
=
=
=
=
=
=
=
=
register W
Decimal Adjust W Register
DAW
None
If [W<3:0> > 9] or [DC = 1] then
(W<3:0>) + 6 → W<3:0>;
else
(
If [W<7:4> + DC > 9] or [C = 1] then
(
else
(W<7:4>) + DC → W<7:4>
C
DAW adjusts the eight-bit value in W,
resulting from the earlier addition of two
variables (each in packed BCD format)
and produces a correct packed BCD
result.
1
1
DAW
W<3:0>) → W<3:0>;
W<7:4>) + 6 + DC → W<7:4> ;
Read
0000
Q2
A5h
0
0
05h
1
0
CEh
0
0
34h
1
0
0000
Process
Data
Q3
0000
Write
Q4
W
0111
Preliminary
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CNT
Z
CNT
Z
Q1
=
=
=
=
register ‘f’
Decrement f
DECF f {,d {,a}}
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f) – 1 → dest
C, DC, N, OV, Z
Decrement register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 24.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
DECF
Read
0000
Q2
01h
0
00h
1
© 2007 Microchip Technology Inc.
CNT,
01da
Process
Data
Q3
1, 0
ffff
destination
Write to
Q4
ffff
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