PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 136
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PIC18F258
Manufacturer Part Number
PIC18F258
Description
High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F258.pdf
(384 pages)
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PIC18FXX8
16.5.2
In the Half-Bridge Output mode, two pins are used as
outputs to drive push-pull loads. The RD4/PSP4/
ECCP1/P1A pin has the PWM output signal, while the
RD5/PSP5/P1B pin has the complementary PWM out-
put signal (Figure 16-3). This mode can be used for
half-bridge applications, as shown in Figure 16-4, or for
full-bridge applications, where four power switches are
being modulated with two PWM signals.
In Half-Bridge Output mode, the programmable dead-
band delay can be used to prevent shoot-through
current in bridge power devices. The value of register
ECCP1DEL dictates the number of clock cycles before
the output is driven active. If the value is greater than
the duty cycle, the corresponding output remains inac-
tive during the entire cycle. See Section 16.5.4 for
more details of the deadband delay operations.
Since the P1A and P1B outputs are multiplexed with
the PORTD<4> and PORTD<5> data latches, the
TRISD<4> and TRISD<5> bits must be cleared to
configure P1A and P1B as outputs.
FIGURE 16-4:
DS41159B-page 134
Standard Half-Bridge Circuit (“Push-Pull”)
Half-Bridge Output Driving a Full-Bridge Circuit
HALF-BRIDGE MODE
PIC18F448/458
EXAMPLES OF HALF-BRIDGE OUTPUT MODE APPLICATIONS
P1A
P1B
PIC18F448/458
P1A
P1B
FET
Driver
FET
Driver
Preliminary
FET
Driver
FET
Driver
FIGURE 16-3:
+
P1A
P1B
td = Deadband Delay
Load
Note 1: At this time, the TMR2 register is equal to the
V+
V-
(2)
(2)
V+
V-
(1)
-
2: Output signals are shown as asserted high.
+
td
Duty Cycle
PR2 register.
Load
Period
-
td
FET
Driver
FET
Driver
HALF-BRIDGE PWM
OUTPUT
2002 Microchip Technology Inc.
+
V
-
+
V
-
(1)
Period
(1)
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