PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 29
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PIC18F258
Manufacturer Part Number
PIC18F258
Description
High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F258.pdf
(384 pages)
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3.7
On power-up, the time-out sequence is as follows:
First, PWRT time-out is invoked after the POR time
delay has expired, then OST is activated. The total
time-out will vary based on oscillator configuration and
the status of the PWRT. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
Figure 3-3, Figure 3-4, Figure 3-5, Figure 3-6 and
Figure 3-7 depict time-out sequences on power-up.
TABLE 3-1:
REGISTER 3-1:
TABLE 3-2:
2002 Microchip Technology Inc.
Note 1: 2 ms = Nominal time required for the 4X PLL to lock.
HS with PLL enabled
Power-on Reset
MCLR Reset during normal
operation
Software Reset during normal
operation
Stack Full Reset during normal
operation
Stack Underflow Reset during
normal operation
MCLR Reset during SLEEP
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt Wake-up from SLEEP
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0'
Note 1: When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
Configuration
External RC
2: 72 ms is the nominal power-up timer delay.
HS, XT, LP
Oscillator
Time-out Sequence
EC
interrupt vector (0x000008h or 0x000018h).
Condition
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
(1)
RCON REGISTER BITS AND POSITIONS
bit 7
R/W-0
72 ms + 1024 T
IPEN
72 ms + 1024 T
PWRTEN = 0
72 ms
72 ms
PC + 2
Program
Counter
PC + 2
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
U-0
—
OSC
Power-up
OSC
(1)
+ 2 ms 1024 T
0--1 1100
0--u uuuu
0--0 uuuu
0--u uu11
0--u uu11
0--u 10uu
0--u 01uu
u--u 00uu
0--1 11u0
u--u 00uu
U-0
Preliminary
—
Register
(2)
RCON
PWRTEN = 1
1024 T
OSC
—
—
R/W-1
OSC
RI
+ 2 ms 72 ms + 1024 T
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire.
Bringing MCLR high will begin execution immediately
(Figure 3-5). This is useful for testing purposes or to
synchronize more than one PIC18FXX8 device
operating in parallel.
Table 3-2 shows the RESET conditions for some
Special Function Registers, while Table 3-3 shows the
RESET conditions for all registers.
RI
1
u
0
u
u
u
u
u
1
u
TO
1
u
u
u
u
1
0
0
1
0
R/W-1
72 ms + 1024 T
TO
PD
1
u
u
u
u
0
1
0
1
0
Brown-out
72 ms
72 ms
POR
0
u
u
1
1
u
u
u
u
u
R/W-1
OSC
PD
(2)
BOR
PIC18FXX8
OSC
+ 2 ms 1024 T
0
u
u
1
1
u
u
u
0
u
STKFUL
R/W-1
POR
Oscillator Switch
Wake-up from
u
u
u
u
1
u
u
u
u
u
DS41159B-page 27
1024 T
SLEEP or
OSC
—
—
STKUNF
R/W-1
OSC
BOR
+ 2 ms
u
u
u
1
u
u
u
u
u
u
bit 0
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