PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 374
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PIC18F258
Manufacturer Part Number
PIC18F258
Description
High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F258.pdf
(384 pages)
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PIC18FXX8
I
I/O Ports ............................................................................. 93
I
ICEPIC In-Circuit Emulator .............................................. 320
ID Locations ............................................................. 261, 275
INCF ................................................................................. 298
INCFSZ ............................................................................ 299
In-Circuit Debugger .......................................................... 275
In-Circuit Serial Programming (ICSP) ...................... 261, 275
Indirect Addressing ............................................................ 56
INFSNZ ............................................................................ 299
Initialization Conditions for All Registers ............................ 30
Instruction Cycle ................................................................. 41
Instruction Flow/Pipelining ................................................. 41
Instruction Format ............................................................ 279
Instruction Set .................................................................. 277
DS41159B-page 372
2
C Mode .......................................................................... 150
ACK Pulse ........................................................ 154, 155
Acknowledge Sequence Timing ............................... 174
Baud Rate Generator ............................................... 167
Bus Collision and Arbitration .................................... 175
Bus Collision During a Repeated
Bus Collision During a START Condition ................. 177
Bus Collision During a STOP Condition ................... 180
Clock Arbitration ....................................................... 168
Clock Stretching ....................................................... 160
Effect of a RESET .................................................... 175
General Call Address Support ................................. 164
Master Mode ............................................................ 165
Master Mode START Condition Timing ................... 169
Master Mode Transmission ...................................... 171
Multi-Master Mode ................................................... 175
Read/Write bit Information (R/W bit) ................ 154, 155
Registers .................................................................. 150
Serial Clock (RC3/SCK/SCL) ................................... 155
Slave Mode .............................................................. 154
SLEEP Operation ..................................................... 175
STOP Condition Timing ........................................... 174
FSR Register .............................................................. 55
INDF Register ............................................................ 55
Operation ................................................................... 55
ADDLW .................................................................... 283
ADDWF .................................................................... 283
ADDWFC ................................................................. 284
ANDLW .................................................................... 284
ANDWF .................................................................... 285
BC ............................................................................ 285
BCF .......................................................................... 286
BN ............................................................................ 286
BNC .......................................................................... 287
BNN .......................................................................... 287
BNOV ....................................................................... 288
BNZ .......................................................................... 288
BOV .......................................................................... 291
BRA .......................................................................... 289
BSF .......................................................................... 289
BTFSC ..................................................................... 290
BTFSS ...................................................................... 290
BTG .......................................................................... 291
START Condition ............................................. 179
Operation ......................................................... 166
Reception ......................................................... 171
Repeated START Condition Timing ................. 170
Addressing ....................................................... 154
Reception ......................................................... 155
Transmission .................................................... 155
Preliminary
INTCON Register
Inter-Integrated Circuit. See I
Interrupt Sources
BZ ............................................................................ 292
CALL ........................................................................ 292
CLRF ....................................................................... 293
CLRWDT ................................................................. 293
COMF ...................................................................... 294
CPFSEQ .................................................................. 294
CPFSGT .................................................................. 295
CPFSLT ................................................................... 295
DAW ........................................................................ 296
DCFSNZ .................................................................. 297
DECF ....................................................................... 296
DECFSZ .................................................................. 297
GOTO ...................................................................... 298
INCF ........................................................................ 298
INCFSZ .................................................................... 299
INFSNZ .................................................................... 299
IORLW ..................................................................... 300
IORWF ..................................................................... 300
LFSR ........................................................................ 301
MOVF ...................................................................... 301
MOVFF .................................................................... 302
MOVLB .................................................................... 302
MOVLW ................................................................... 303
MOVWF ................................................................... 303
MULLW .................................................................... 304
MULWF .................................................................... 304
NEGF ....................................................................... 305
NOP ......................................................................... 305
POP ......................................................................... 306
PUSH ....................................................................... 306
RCALL ..................................................................... 307
RESET ..................................................................... 307
RETFIE .................................................................... 308
RETLW .................................................................... 308
RETURN .................................................................. 309
RLCF ....................................................................... 309
RLNCF ..................................................................... 310
RRCF ....................................................................... 310
RRNCF .................................................................... 311
SETF ........................................................................ 311
SLEEP ..................................................................... 312
SUBFWB ................................................................. 312
SUBLW .................................................................... 313
SUBWF .................................................................... 313
SUBWFB ................................................................. 314
SWAPF .................................................................... 314
TBLRD ..................................................................... 315
TBLWT ..................................................................... 316
TSTFSZ ................................................................... 317
XORLW .................................................................... 317
XORWF ................................................................... 318
Summary Table ....................................................... 280
RBIF bit ...................................................................... 95
A/D Conversion Complete ....................................... 240
CAN Module ............................................................ 234
Capture Complete (CCP) ......................................... 123
Compare Complete (CCP) ....................................... 124
Interrupt-on-Change (RB7:RB4) ................................ 95
TMR0 Overflow ........................................................ 109
TMR1 Overflow .................................................111, 113
TMR2 to PR2 Match ................................................ 116
TMR2 to PR2 Match (PWM) .............................115, 126
TMR3 Overflow .................................................117, 119
2
2002 Microchip Technology Inc.
C