PEB2096 SIEMENS [Siemens Semiconductor Group], PEB2096 Datasheet - Page 31

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PEB2096

Manufacturer Part Number
PEB2096
Description
Octal Transceiver for UPN Interfaces OCTAT-P
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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There are two possibilities how to synchronize the U
with SSYNC.
3.5.1
The short FSC pulse has a width of one DCL clock (in normal use the FSC is at least 2
DCL wide). The SSYNC input must be set to 1. The period of the short FSC pulses must
be a multiple of 1 ms. The U
A zero pulse on the SSYNC input forces the OCTAT-P to start a multiframe with a code
violation in the next M-bit. Refer to figure 16.
allowed. If the bit SYNEN is set (Configuration Register, bit 7) the zero pulse on SSYNC
3.5
channel 0 which follows the short FSC pulse. Refer to figure 15.
Figure 15
Synchronization with a short FSC
3.5.2
Figure 16
Synchronization with SSYNC
While using SSYNC for U
forces the OCTAT-P also to set the T bit in the next U
input must be connected to
Semiconductor Group
U
Synchronization with a Short FSC
Synchronization using SSYNC (for DECT)
PN
Multiframe Synchronization
PN
V
PN
DD
multiframe synchronization the short FSC signal is not
.
frame with a code violation in the M bit starts in the IOM
31
PN
PN
multiframe: With a short FSC or
frame. If not used the SSYNC
PEB 2096
01.96

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