PEB2096 SIEMENS [Siemens Semiconductor Group], PEB2096 Datasheet - Page 48

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PEB2096

Manufacturer Part Number
PEB2096
Description
Octal Transceiver for UPN Interfaces OCTAT-P
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet

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4.4
Format:
Initial Value:
Description:
4.5
Test registers are implemented in the address range of 8
Semiconductor Group
SYNEN
bit 7
Configuration Register for U
Test Registers – (Read/Write)
BALEN
2
00
20
SYNEN:
BALEN:
EQUDIS:
H
H
H
EQUDIS
if the MODE pin is connected to
if the MODE pin is connected to
SSYNC = low sets the first T bit in the superframe to
high (refer to timing specification)
Activates the DC balancing bit if INFO 4 (or 2) was
transmitted. It is independent of the line performance.
Disables the Equalizer when set to 1
0
PN
Line Interfaces – (Write)
48
0
0
H
to B
V
V
DD
SS
H
; they are not for
0
or
PEB 2096
bit 0
0
01.96

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