ISL6112 INTERSIL [Intersil Corporation], ISL6112 Datasheet - Page 21

• Manufacturer Part Number: ISL6112
• Description: Dual Slot PCI-Express Power Controller
• Manufacturer: INTERSIL [Intersil Corporation]

Control Register, Slot B (CNTRLB)
8-Bits, Read/Write
AUXBPG
MAINBPG
D[5]
D[4]
D[3]
FORCE_B
ENABLE
MAINB
VAUXB
Power-Up Default Value:
Command_Byte Value (R/W):
The power-up default value is 00
NOTES:
12. The values of the MAINBPG and AUXBPG register bits are not affected by FORCE_ONB, but will instead continue to read as high if power is
11. The state of the PWRGDB pin is the logical AND of the values of the AUXBPG and the MAINBPG bits, except when FORCE_ONB is asserted.
BIT(s)
If FORCE_ONB is asserted (the pin is pulled low), and FORCE_BENABLE is set to a logic zero, the PWRGDB pin will be unconditionally
forced to its open-drain (“Power Not Good”) state.
“Good,” and as low if the conditions, which indicate that power is good, are not met.
read-only
AUXBPG
D[7]
AUX output power-good status, Slot B
MAIN output power-good status, Slot B
Reserved
Reserved
Reserved
Allows or inhibits the operation of the FORCE_ONB input pin
MAIN enable control, Slot B
VAUX enable control, Slot B
MAINBPG
read-only
D[6]
21
h
. Slot is disabled upon power-up, i.e., all supply outputs are off.
FUNCTION
TABLE 7. CONTROL REGISTER, SLOT B (CNTRLB)
Reserved
read only
D[5]
0000 0000
0000 0011
b
b
= 00
= 03
ISL6112
Reserved
read only
h
h
D[4]
1 = Power-is-Good (VAUXB Output is above its UVLO
threshold)
1 = Power-is-Good (MAINB Outputs are above their UVLO
thresholds)
Always read as zero
Always read as zero
Always read as zero
0 = FORCE_ONB is enabled
1 = FORCE_ONB is disabled
0 = Off, 1 = On
0 = Off, 1 = On
Reserved
read-only
D[3]
FORCE_B
read/write
ENABLE
OPERATION
D[2]
read/write
MAINB
D[1]
September 28, 2007
read/write
VAUXB
D[0]
FN6456.0