ISL6422 INTERSIL [Intersil Corporation], ISL6422 Datasheet - Page 19

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ISL6422

Manufacturer Part Number
ISL6422
Description
Dual Output LNB Supply and Control Voltage Regulator with I2C Interface for Advanced Satellite Set-Top Box Designs
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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Thin Shrink Small Outline Exposed Pad Plastic Packages (EPTSSOP)
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
N
N
1
1
0.10(0.004)
2
2
-A-
BOTTOM VIEW
INDEX
AREA
TOP VIEW
3
3
e
0.05(0.002)
b
D
P
M
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
C A
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
SEATING PLANE
M
For information regarding Intersil Corporation and its products, see www.intersil.com
P1
E1
-C-
-B-
B S
A
19
E
A1
α
0.10(0.004)
0.25(0.010)
GAUGE
PLANE
0.010
A2
M
0.25
B
M
L
c
ISL6422
M38.173B
38 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
NOTES:
10. Controlling dimension: MILLIMETER. Converted inch dimen-
11. Dimensions “P” and “P1” are thermal and/or electrical enhanced
SYMBOL
1. These package dimensions are within allowable dimensions of
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
4. Dimension “E1” does not include interlead flash or protrusions.
5. The chamfer on the body is optional. If it is not present, a visual
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
A1
A2
E1
P1
JEDEC MO-153-BD-1, Issue F.
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
index feature must be located within the crosshatched area.
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum
space between protrusion and adjacent lead is 0.07mm (0.0027
inch).
sions are not necessarily exact. (Angles in degrees)
variations. Values shown are maximum size of exposed pad
within lead count and body size.
D
N
α
A
b
e
E
L
P
c
0.002
0.031
0.0075
0.0035
0.378
0.169
0.246
0.0177
MIN
0
0.0197 BSC
-
-
-
o
INCHES
38
0.047
0.006
0.051
0.0106
0.0079
0.386
0.177
0.256
0.0295
MAX
0.256
0.126
8
o
0.05
0.80
0.17
0.09
9.60
4.30
6.25
0.45
MILLIMETERS
MIN
0
-
-
-
0.500 BSC
o
38
MAX
1.20
0.15
1.05
0.27
0.20
9.80
4.50
6.50
0.75
6.5
3.2
8
o
Rev. 0 9/06
April 10, 2007
NOTES
FN9190.1
11
11
9
3
4
6
7
-
-
-
-
-
-
-

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