ISL8103 INTERSIL [Intersil Corporation], ISL8103 Datasheet - Page 18

• Manufacturer Part Number: ISL8103
• Description: Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers
• Manufacturer: INTERSIL [Intersil Corporation]

LOWER MOSFET POWER CALCULATION
The calculation for the approximate power loss in the lower
MOSFET can be simplified, since virtually all of the loss in
the lower MOSFET is due to current conducted through the
channel resistance (r
maximum continuous output current, I
inductor current (see Equation 1), and d is the duty cycle
(V
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I
frequency, F
the beginning and the end of the lower-MOSFET conduction
interval respectively.
The total maximum power dissipated in each lower MOSFET
is approximated by the summation of P
UPPER MOSFET POWER CALCULATION
In addition to r
MOSFET losses are due to currents conducted across the
input voltage (V
higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times, the lower-MOSFET body-diode reverse-
recovery charge, Q
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 16,
the required time for this commutation is t
approximated associated power loss is P
P
P
P
LOW 1
UP 1 ,
LOW 2
OUT
,
,
≈
/V
V
IN
=
=
IN
).
r
V
DS ON
⋅
SW
D ON


I
----- -
(
N
(
DS(ON)
M
·
, and the length of dead times, t
IN
+
)
) during switching. Since a substantially
)
I
-------- -
PP
⋅
⋅
rr
2
F
, and the upper MOSFET r
DS(ON)



SW


I
----- -
losses, a large portion of the upper-
N
M
⋅






⋅
2
t
----
2
M
1
⋅





, V
I
----- -
(
N
). In Equation 14, I
M
1 d
⋅
18
F
D(ON)
–
+
SW
I
-------- -
PP
)
2
+
 t

I
------------------------------------ -
, the switching
L PP
⋅
,
PP
d1
2
LOW,1
+
is the peak-to-peak
12
UP,1
⋅
1
(


1 d
and the
I
----- -
N
M
–
.
–
and P
M
d1
DS(ON)
)
I
-------- -
PP
2
is the
and t
 t

(EQ. 15)
LOW,2
⋅
(EQ. 14)
(EQ. 16)
d2
d2
, at
.
ISL8103
At turn on, the upper MOSFET begins to conduct and this
transition occurs over a time t
approximate power loss is P
A third component involves the lower MOSFET reverse-
recovery charge, Q
commutated to the upper MOSFET before the lower-
MOSFET body diode can recover all of Q
through the upper MOSFET across V
dissipated as a result is P
Finally, the resistive part of the upper MOSFET is given in
Equation 19 as P
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 16, 17, 18 and 19. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process involving
repetitive solutions to the loss equations for different
MOSFETs and different switching frequencies.
Package Power Dissipation
When choosing MOSFETs it is important to consider the
amount of power being dissipated in the integrated drivers
located in the controller. Since there are a total of three
drivers in the controller package, the total power dissipated
by all three drivers must be less than the maximum
allowable power dissipation for the QFN package.
Calculating the power dissipation in the drivers for a desired
application is critical to ensure safe operation. Exceeding the
maximum allowable power dissipation level will push the IC
beyond the maximum recommended operating junction
temperature of 125°C. The maximum allowable IC power
dissipation for the 6x6 QFN package is approximately 4W at
room temperature. See Layout Considerations paragraph for
thermal transfer improvement suggestions.
When designing the ISL8103 into an application, it is
recommended that the following calculation is used to
ensure safe operation at the desired frequency for the
selected MOSFETs. The total gate drive power losses,
P
integrated driver’s internal circuitry and their corresponding
average driver current can be estimated with Equations 20
and 21, respectively.
P
P
P
Qg_TOT
UP 3 ,
UP 4 ,
UP 2 ,
≈
≈
=
r
V
DS ON
V
, due to the gate charge of MOSFETs and the
IN
IN
(
⋅
⋅


Q
I
----- -
N
M
)
rr
⋅
–
⋅
UP,4



F
I
-------- -
I
----- -
PP
N
rr
2
M
SW
. Since the inductor current has fully



.


2
⋅
⋅



d
t
----
2
UP,3
2
+



I
--------- -
UP,2
PP
12
⋅
2
F
.
2
. In Equation 17, the
SW
.
IN
. The power
rr
, it is conducted
February 15, 2006
(EQ. 17)
(EQ. 18)
(EQ. 19)
FN9246.0