ISL8200AM INTERSIL [Intersil Corporation], ISL8200AM Datasheet - Page 14

• Manufacturer Part Number: ISL8200AM
• Description: Complete Current Share 10A DC/DC Power Module
• Manufacturer: INTERSIL [Intersil Corporation]

Selection of the Input Capacitor
The input filter capacitor should be based on how much ripple
the supply can tolerate on the DC input line. The larger the
capacitor, the less ripple expected, but consideration should be
taken for the higher surge current during power-up. The
ISL8200AM provides the soft-start function that controls and
limits the current surge. The value of the input capacitor can be
calculated by Equation 4:
C
Where:
C
I
D is the duty cycle (V
V
F
In addition to the bulk capacitance, some low Equivalent Series
Inductance (ESL) ceramic capacitance is recommended to
decouple between the drain terminal of the high side MOSFET
and the source terminal of the low side MOSFET. This is used to
reduce the voltage ringing created by the switching current
across parasitic circuit elements.
Output Capacitors
The ISL8200AM is designed for low output voltage ripple. The
output voltage ripple and transient requirements can be met with
bulk output capacitors (C
Resistance (ESR); the recommended ESR is <10mΩ. When the
total ESR is below 4mΩ, a capacitor (C
recommended; C
the VOUT and VOUT_SET pin. C
capacitor, a low ESR polymer capacitor or a ceramic capacitor.
The typical capacitance is 330µF and decoupled ceramic output
capacitors are used per phase. The internally optimized loop
compensation provides sufficient stability margins for all
ceramic capacitor applications with a recommended total value
of 300µF per phase. Additional output filtering may be needed if
further reduction of output ripple or dynamic transient spike is
required.
Using Multiple Phases
The ISL8200AM can be easily connected in parallel with other
ISL8200AM modules and current share providing an additional
10A per phase. For 2 phases, simply follow the schematic shown
in Figure 4. A rough summary shows that the modules share VIN,
VOUT, GND and have their ISHARE pins tied together with a 10kΩ
resistor to ground (per phase). When using 3 phases or more, it is
recommended that you add the following circuitry (see Figure 24)
to ensure proper startup. The circuit shown in Figure 24 ensures
proper startup by injecting current into the ISHARE line until all
phases are ready to start regulating. For additional phases, the
RC time constant, using R
to increase the turn on time of the PFET (QSHR). For 3-4 phases,
these are the values, R
Signal PFET, C
O
S
IN MIN
IN(MIN)
P-P(MAX)
is the output current (A)
is the switching frequency (Hz)
(
)
is the minimum input capacitance (µF) required
=
is the maximum peak-to-peak voltage (V)
I
O
•
G
-------------------------------------- -
V
= 22nF).
P-P MAX
D
FF
•
(
is placed in parallel with RSET, in between
(
O
1 D
/V
INC
–
)
IN
OUT
•
INC­
)
)
= 243k, R
F
S
) with low enough Equivalent Series
14
and C
OUT
can be a low ESR tantalum
G
PH1
, might have to be adjusted
FF
) between 2.2nF-10nF is
= 15k, Q
SHR
= Small
ISL8200AM
(EQ. 4)
Functional Description
Initialization
The ISL8200AM requires VCC and PVCC to be biased by a single
supply. Power-On Reset (POR) circuits continually monitor the
bias voltages (PVCC and VCC) and the voltage at the EN pin. The
POR function initiates soft-start operation 384 clock cycles after
the EN pin voltage is pulled to be above 0.8V; all input supplies
exceed their POR thresholds and the PLL locking time expires.
The enable pin can be used as a voltage monitor and to set
desired hysteresis with an internal 30µA sinking current going
through an external resistor divider. The sinking current is
disengaged after the system is enabled. This feature is especially
designed for applications that require higher input rail POR for
better undervoltage protection. For example, in 12V applications,
R
(V
1.6V hysteresis (V
Figure 29 on page 15.
During shutdown or fault conditions, the soft-start is quickly reset
while UGATE and LGATE immediately change state (<100ns)
upon the input dropping below POR.
Soft-Start
The ISL8200AM has an internal digital pre-charged soft-start
circuitry, which has a rise time inversely proportional to the
switching frequency and is determined by a digital counter that
increments with every pulse of the phase clock. The full soft-start
time from 0V to 0.6V can be estimated by Equation 5.
t
SS
UP
EN_RTH
ISHARE
PLL LOCKING
=
= 53.6k and R
2560
------------- -
f
PVCC POR
SW
VCC (PHASE 1)
VCC POR
EN POR
Q
) to 10.6V and turn-off threshold (V
SHR
FIGURE 25. SOFT-START INITIALIZATION LOGIC
HIGH = ABOVE POR; LOW = BELOW POR
R
FIGURE 24. STARTUP CIRCUITRY
INC
EN_HYS
DOWN
C
G
). These numbers are explained in
= 5.23k will set the turn-on threshold
AND
CYCLES
384
D
R
D
PH2
PH1
PH2
EN_FTH
DIODES PER PHASE
ISFETDRV (PHASE 1)
ISFETDRV (PHASE 2)
ISFETDRV (PHASE 3)
ADD ADDITIONAL
SOFT-START
OF MODULE
September 13, 2012
) to 9V, with
FN8271.2
(EQ. 5)