SSTUM32866EC/G NXP [NXP Semiconductors], SSTUM32866EC/G Datasheet - Page 14
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SSTUM32866EC/G
Manufacturer Part Number
SSTUM32866EC/G
Description
1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.SSTUM32866ECG.pdf
(28 pages)
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NXP Semiconductors
SSTUM32866_1
Product data sheet
Fig 7. Timing diagram for SSTUM32866 used as a single device; C0 = 0, C1 = 0
PAR_IN
RESET
QERR
DCS
CSR
PPO
Q25
D25
CK
CK
Q1
D1
to
to
10.1 Timing diagrams
CK to Q
t
PD
t
su
m
t
h
Rev. 01 — 29 June 2007
t
su
1.8 V DDR2-1G configurable registered buffer with parity
m + 1
t
h
CK to QERR
CK to PPO
t
t
PD
PD
m + 2
m + 3
SSTUM32866
CK to QERR
t
PD
© NXP B.V. 2007. All rights reserved.
m + 4
002aaa655
14 of 28
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