SAK-XC161CJ-16F20F INFINEON [Infineon Technologies AG], SAK-XC161CJ-16F20F Datasheet - Page 21

• Manufacturer Part Number: SAK-XC161CJ-16F20F
• Description: 16-Bi t Single-Chip Microcontroller Preliminary
• Manufacturer: INFINEON [Infineon Technologies AG]

Preliminary
3
The architecture of the XC161 combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a very well-balanced way. In
addition, the on-chip memory blocks allow the design of compact systems-on-silicon with
maximum performance (computing, control, communication).
The on-chip memory blocks (program code-memory and SRAM, dual-port RAM, data
SRAM) and the set of generic peripherals are connected to the CPU via separate buses.
Another bus, the LXBus, connects additional on-chip resoures as well as external
resources (see
This bus structure enhances the overall system performance by enabling the concurrent
operation of several subsystems of the XC161.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the XC161.
Figure 3
Data Sheet
XTAL
P 20
Channels
Clock Generation
8/10-Bit
ADC
Debug Support
12/16
Osc / PLL
Functional Description
6
OCDS
Port 9
128 KBytes
ProgMem
PSRAM
Block Diagram
6
Flash
Figure
GPT
P 7
T2
T3
T4
T5
T6
4
Port 6
(USART)
ASC0
BRGen
RTC
3).
8
ASC1
(USART)
WDT
BRGen
Port 5
16
SSC0
BRGen
(SPI)
Port 4
SSC1
C166SV2-Core
8
BRGen
(SPI)
Interrupt & PEC
DPRAM
17
CPU
Port 3
CC1
T0
T1
15
CC2
Port 2
T7
T8
Peripheral Data Bus
Interrupt Bus
8
BRGen
IIC
Functional Description
PORT1
SDLM
16
XBUS Control
External Bus
DSRAM
Control
EBC
MCB04323_x1.vsd
Derivatives
PORT0
V1.0, 2002-03
Twin
CAN
A B
16
XC161