ADV3002-EVALZ AD [Analog Devices], ADV3002-EVALZ Datasheet - Page 13

• Manufacturer Part Number: ADV3002-EVALZ
• Description: 4:1 HDMI/DVI Switch with Equalization, DDC/CEC Buffers and EDID Replication
• Manufacturer: AD [Analog Devices]

HDMI/DVI receiver. If both the internal terminations are enabled
and external terminations are present, set the output current level
to 20 mA by programming the TX_OCL bit of the TMDS output
control register, as shown in Table 10 (20 mA is the default upon
reset). If only external terminations are provided (if the internal
terminations are disabled), set the output current level to 10 mA
by programming the TX_OCL bit of the TMDS output control
register. The high speed outputs must be disabled if there are no
output termination resistors present in the system.
DDC BUFFERS
The DDC buffers are 5 V tolerant bidirectional lines that carry
extended display identification data (EDID) and high bandwidth
digital content protection (HDCP) encryption. The ADV3002
provides switching and buffering for the DDC buses. The DDC
buffers are bidirectional, and fully support arbitration, clock
synchronization, and other relevant features of a standard mode
I
2
C bus.
PORT A
PORT B
PORT C
PORT D
HDMI
HDMI
HDMI
HDMI
2
2
2
2
WRITE
SLAVE
SLAVE
SLAVE
SLAVE
READ/
READ
READ
READ
I
I
I
I
2
2
2
2
C
C
C
C
2
2
2
2
Figure 23. EDID Replication Block Diagram
CONTROL
SRAM
EDID
Rev. 0 | Page 13 of 28
DDC
MUX
MASTER
READ/
WRITE
SLAVE
I
I
2
2
2
C
C
EDID REPLICATION
The ADV3002 EDID replication feature reduces the total system
cost by eliminating the need for an EDID EEPROM for each HDMI
port. With the ADV3002, only a single external EDID is necessary.
The ADV3002 stores the EDID information in an on-chip SRAM.
This enables the EDID information to be simultaneously accessible
to all four HDMI ports. The ADV3002 combines the 5 V power
from the four HDMI sources such that the EDID information can
be available even when the system power is off. A block diagram
of the ADV3002 DDC buffering and EDID replication scheme is
shown in Figure 23.
2
2
2
EDID_[SCL/SDA]
I2C_[SCL/SDA]
HDMI
Rx
EXTERNAL
EEPROM
EDID
MCU
v1.3
ADV3002