ADV3002-EVALZ AD [Analog Devices], ADV3002-EVALZ Datasheet - Page 15

• Manufacturer Part Number: ADV3002-EVALZ
• Description: 4:1 HDMI/DVI Switch with Equalization, DDC/CEC Buffers and EDID Replication
• Manufacturer: AD [Analog Devices]

EDID Replication with External EEPROM
The ADV3002 has dedicated pins to interface to an external EDID
EEPROM: EDID_SDA and EDID_SCL. In the default configuration,
after the first hot plug event or system power-up, the internal I
master in the ADV3002 copies the contents of the external EDID
EEPROM into the on-chip SRAM. While the EDID is being copied,
the HPD signals for all four ports are held low by the ADV3002. A
flowchart of the start-up procedure is shown in Figure 25. The entire
start-up procedure takes less than 10 ms. The EDID replication
feature can be disabled using the EDID_ENABLE pin.
Writing to the EDID EEPROM
The EDID data can be written to the external EEPROM by writing
data via the I
In both cases, the EDID write procedure is as follows:
1.
2.
3.
EDID Replication with External Microcontroller
The on-chip SRAM can be preloaded using an external microcontrol-
ler. Prior to loading the SRAM, disable the I
0x01 to the EDID replication mode register. The microcontroller
can then write EDID information into the SRAM via the ADV3002
I
part address of 0xA0. When the EDID copy process is complete,
enable the EDID replication function by writing 0x00 to the EDID
replication mode register. The EDID_SDA and EDID_SCL pins
are unused when an external microcontroller is used to program
the SRAM. These pins can be tied either high or low through a
resistor, but should not be left floating.
2
C control interface. The writes to the SRAM should be to the fixed
<100µs
<10ms
Figure 25. EDID Replication Start-Up Flowchart with External EEPROM
Write Value 0x96 to the EDID EEPROM write protect
password register, 0x0F. The ADV3002 fixed part address is
required to write to this register.
Write the EDID data to the EEPROM fixed part address
(0xA0). Data must be written one byte at a time.
Write Value 0x00 to the EDID EEPROM write protect
password register, 0x0F.
2
C control interface or via the HDMI A DDC inputs.
COPY EDID INFORMATION
FOR EDID POWER-UP
OR FIRST HOT PLUG
POWER-UP, RESET,
RESPOND TO EDID
TO ADV3002 SRAM
DETERMINE SPA
AND CHECKSUM
WAIT FOR EDID
REQUEST
REQUEST
WAIT
2
C master by writing
HPD ALL PORTS = LOW
HPD ALL PORTS = HIGH
2
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C
Reset
Pullling the RESETB pin low initiates a restart of the EDID
replication procedure shown in Figure 25 when the local system
supply is on. If the local system supply is off, the RESETB pin has
no effect.
5 V COMBINER
The 5 V combiner circuit combines the four 5 V supplies from
the four HDMI sources and provides the necessary power to the
ADV3002 EDID replication circuit, the CEC buffer, as well as the
external EDID EEPROM, if applicable. The combiner circuit is
designed such that the current limits on each of the 5 V supplies
are not exceeded when the local system power is either on or off.
A simplified circuit diagram of the 5 V combiner is shown in
Figure 26. The combiner detects the presence of the voltage on
the 5 V pin (P5V_x) from the HDMI connectors and closes the
respective internal switch to connect the 5 V to AMUXVCC.
If the local system 3.3 V and 5 V supplies are available, then the
combiner opens all the switches.
CEC BUFFER
The CEC buffer is bidirectional and includes integrated on-chip
pull-up resistors. The CEC buffer isolates capacitance from the
PCB and local system microcontroller, which is particularly
advantageous in systems where the microcontroller is not placed
near the HDMI connectors. The integrated on-chip pull-up resistors
are connected to an internal 3.3 V supply that is generated from
the AMUXVCC supply; thus, the CEC buffer is fully compliant
with the CEC line degradation specifications, when the local system
power supply is either on or off.
HOT PLUG DETECT CONTROL
The HPD lines going into the ADV3002 are normally high imped-
ance but are pulled low for greater than 100 ms when a channel
switch occurs. This pull-down pulse width can be changed by
modifying the value in the hot plug detect pulse width control
register (0x05), as shown in Table 10. Also, the HPD pulse can be
manually controlled using the hot plug detect manual override
control register (0x06), as shown in Table 10.
P5V_A
P5V_B
P5V_C
P5V_D
Figure 26. 5 V Combiner Simplified Circuit Diagram
DETECT
DETECT
DETECT
DETECT
AMUXVCC
ADV3002