ADL5519ACPZ-R2 AD [Analog Devices], ADL5519ACPZ-R2 Datasheet - Page 21

• Manufacturer Part Number: ADL5519ACPZ-R2
• Description: 1 MHz to 10 GHz, 50 dB Dual Log Detector/Controller
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
Once slope and intercept have been calculated, an equation can
be written that will allow calculation of the input power based
on the output voltage of the detector.
The log conformance error of the calculated power is given by
Figure 24 includes a plot of the error at 25°C, the temperature at
which the log amp is calibrated. Note that the error is not zero.
This is because the log amp does not perfectly follow the ideal
V
error at the calibration points (−43 dBm and −23 dBm in this
case) will, however, be equal to zero by definition.
Figure 24 also includes error plots for the output voltage at
−40°C and +85 °C. These error plots are calculated using the
slope and intercept at 25°C. This is consistent with calibration
in a mass-production environment, where calibration at
temperature is not practical.
ALTERING THE SLOPE
None of the changes to operating conditions discussed so far
affect the logarithmic slope, V
readily be altered by controlling the fraction of OUT[A, B] that
is fed back to the setpoint interface at the VST[A, B] pin. When
the full signal from OUT[A, B] is applied to VST[A, B], the
slope assumes its nominal value of -22 mV/dB. It can be
increased by including a voltage divider between these pins, as
shown in Figure 25. Moderately low resistance values should be
used to minimize scaling errors due to the approximately 40 kΩ
input resistance at the VST[A, B] pin. Keep in mind that this
resistor string also loads the output, and it eventually reduces
the load-driving capabilities if very low values are used.
Equation 17 can be used to calculate the resistor values.
where:
S
R2' is the value of R2 in parallel with 40 kΩ.
For example, using R1 = 1.65 kΩ and R2 = 1.69 kΩ (R2' =
1.62 kΩ), the nominal slope is increased to -44 mV/dB.
Operating at a high slope is useful when it is desired to measure
a particular section of the input range in greater detail.
When the slope is raised by some factor, the loop capacitor,
CLP[A, B], should be raised by the same factor to ensure
stability and to preserve a chosen averaging time. The slope can
be lowered by placing a voltage divider after the output pin,
following standard practice.
D
OUT
is the desired slope, expressed in mV/dB.
P
Error (dB) = (V
R1 = R2' (S
vs. P
IN
(unknown) = (V
IN
equation, even within its operating region. The
D
/-22 − 1)
OUT(MEASURED)
OUT1(measured)
SLOPE
− V
, in Equation 7. The slope can
/Slope) + Intercept
OUT(IDEAL)
)/Slope
(17)
Rev. PrB | Page 21 of 27
OUTPUT FILTERING
Accurate power detection for signals with RF bursts is achieved
when the ADL5519 is able to respond quickly to the change in
RF power. For applications in which maximum video
bandwidth and, consequently, fast rise time are desired, it is
essential that the CLP[A,B] pin be left unconnected and free of
any stray capacitance.
The nominal output video bandwidth of 50 MHz can be
reduced by connecting a ground-referenced capacitor (C
the CLPF pin, as shown in Figure 26. This is generally done to
reduce output ripple (at twice the input frequency for a
symmetric input waveform such as sinusoidal signals).
C
The video bandwidth should typically be set to a frequency
equal to about one-tenth the minimum input frequency. This
ensures that the output ripple of the demodulated log output,
which is at twice the input frequency, is well filtered.
BASIS FOR ERROR CALCULATIONS
The slope and intercept are derived using the coefficients of a
linear regression performed on data collected in its central
operating range. Error is stated in two forms: (1) error from
linear response to CW waveform and (2) output delta from
25°C performance.
The error from linear response to CW waveform is the decibel
difference in output from the ideal output defined by the
conversions gain and output reference. This is a measure of the
linearity of the device response to both CW and modulated
waveforms. The error in dB is calculated by
FLT
is selected using the following equation:
C
Figure 26. Lowering the Postdemodulation Bandwidth
FLT
I
LOG[A,B]
=
Figure 25. External Network to Raise Slope
(
1.5kΩ
π
ADL5519
×
1
5 .
OUT[A,B]
VST[A,B]
k
Ω
3.5pF
×
Video
ADL5519
1
+4
Bandwidth
R1
R2
OUT[A,B]
CLP[A,B]
V OUT
)
C
−
FLT
ADL5519
3
5 .
pF
FLT
) to
(10)