CS8416-IZ CIRRUS [Cirrus Logic], CS8416-IZ Datasheet - Page 31

• Manufacturer Part Number: CS8416-IZ
• Description: 192 kHZ DIGITAL AUDIO INTERFACE RECEIVER
• Manufacturer: CIRRUS [Cirrus Logic]

8.12
DS578PP2
7
0
DGTL_SIL – Digital Silence was detected: at least 2047 consecutive constant samples of the same 24-bit
96KHZ – if input sample rate is ≤ 48 KHz, outputs a “0”. Outputs a “1” if the sample rate is ≥ 88.1 KHz.
DTS_CD – DTS_CD data was detected
Reserved – This bit may change state depending on the input audio data.
Receiver Error (0Ch)
QCRC - Q-subcode data CRC error indicator. Updated on Q-subcode block boundaries
CCRC - Channel Status Block Cyclic Redundancy Check bit. Updated on CS block boundaries,
valid in Pro mode
UNLOCK - PLL lock status bit. Updated on CS block boundaries.
V - Received AES3 Validity bit status. Updated on sub-frame boundaries.
CONF - Confidence bit. Updated on sub-frame boundaries.
BIP - Bi-phase error bit. Updated on sub-frame boundaries.
PAR - Parity bit. Updated on sub-frame boundaries.
This register contains the AES3 receiver and PLL status bits. Unmasked bits will go high on occur-
rence of the error, and will stay high until the register is read. Reading the register resets all bits to 0,
unless the error source is still true. Bits that are masked off in the receiver error mask register will
always be 0 in this register.
0 - No error
1 - Error
0 - No error
1 - Error
0 - PLL locked
1 - PLL out of lock
0 - Data is valid and is normally linear coded PCM audio
1 - Data is invalid, or may be valid compressed audio
0 - No error
1 - Confidence error. This indicates that the received data eye opening is less than half a bit period,
indicating a poor link that is not meeting specifications.
0 - No error
1 - Bi-phase error. This indicates an error in the received bi-phase coding.
0 - No error
1 - Parity error
QCRC
audio data on both channels.
Otherwise output indeterminate.
6
CCRC
5
UNLOCK
4
V
3
CONF
2
BIP
1
CS8416
PAR
0
31