CS8420 CIRRUS [Cirrus Logic], CS8420 Datasheet - Page 34

• Manufacturer Part Number: CS8420
• Description: DIGITAL AUDIO SAMPLE RATE CONVERTER
• Manufacturer: CIRRUS [Cirrus Logic]

11.6
SIMS
SISF
SIRES1-0
SIJUST
SIDEL
SISPOL
SILRPOL
34
SIMS
7
Serial Audio Input Port Data Format (5)
SISF
0 - Serial audio input port is in slave mode (default)
1 - Serial audio input port is in master mode
0 - 64*Fsi (default)
1 - 128*Fsi
00 - 24 bit resolution (default)
01 - 20 bit resolution
10 - 16 bit resolution
11 - Reserved
0 - Left-justified (default)
1 - Right-justified
0 - MSB of SDIN data occurs in the first ISCLK period after the ILRCK edge (default)
1 - MSB of SDIN data occurs in the second ISCLK period after the ILRCK edge
0 - SDIN sampled on rising edges of ISCLK (default)
1 - SDIN sampled on falling edges of ISCLK
0 - SDIN data is for the left channel when ILRCK is high (default)
1 - SDIN data is for the right channel when ILRCK is high
Master/Slave Mode Selector
ISCLK frequency (for master mode)
Resolution of the input data, for right-justified formats
Justification of SDIN data relative to ILRCK
Delay of SDIN data relative to ILRCK, for left-justified data formats
ISCLK clock polarity
ILRCK clock polarity
6
SIRES1
5
SIRES0
4
SIJUST
3
SIDEL
2
SISPOL
1
CS8420
DS245PP2
SILRPOL
0