CS8420 CIRRUS [Cirrus Logic], CS8420 Datasheet - Page 68

• Manufacturer Part Number: CS8420
• Description: DIGITAL AUDIO SAMPLE RATE CONVERTER
• Manufacturer: CIRRUS [Cirrus Logic]

14.7.1 Pin Description - Hardware Mode 6
Overall Device Control:
DFC0, DFC1 - Data Flow Control Inputs
S/AES - Serial Audio or AES3 Input Select
SFMT0, SFMT1 - Serial Audio Input Port Data Format Select Inputs
OMCK - Output Section Master Clock Input
Audio Input Interface:
SDIN - Serial Audio Input Port Data Input
ISCLK - Serial Audio Input Port Bit Clock Input or Output
ILRCK - Serial Audio Input Port Left/Right Clock Input or Output
APMS - Serial Audio Input Port Master or Slave
AES3/SPDIF Transmitter Interface:
TXN, TXP - Differential Line Driver Outputs
68
DFC0 and DFC1 inputs determine the major data flow options available in hardware mode, according to
Table 3.
S/AES is connected to VD+ in hardware mode 6, in order to select the serial audio input.
SFMT0 and SFMT1 select the serial audio input port format. See Table 14.
Output section master clock input. The frequency must be 256x the output sample rate (Fso).
Audio data serial input pin.
Serial bit clock for audio data on the SDIN pin.
Word rate clock for the audio data on the SDIN pin.
APMS should be connected to VD+ to set serial audio input port as a master, or connected to DGND to
set the port as a slave.
Differential line driver outputs, transmitting AES3 type data. Drivers are pulled to low while the CS8420
is in the reset state.
* Pins which remain the same function in all modes.
COPY/C
TCBLD
SFMT0
SFMT1
ILRCK
AGND
ISCLK
EMPH
APMS
DFC0
SDIN
FILT
RST
VA+
1
2
3
4
5
6*
7*
8*
9*
10
11
12
13
14
*24
*23
*22
28
27
26
25
21
20
19
18
17
16
15
ORIG
DFC1
TXP
TXN
H/S
VD+
DGND
OMCK
S/AES
AUDIO
U
V
CEN
TCBL
CS8420
DS245PP2