ST16C1450CJ28 EXAR [Exar Corporation], ST16C1450CJ28 Datasheet - Page 17

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ST16C1450CJ28

Manufacturer Part Number
ST16C1450CJ28
Description
2.97V TO 5.5V UART
Manufacturer
EXAR [Exar Corporation]
Datasheet

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REV. 4.2.0
LCR[1:0]: TX and RX Word Length Select
These two bits specify the word length to be transmitted or received.
LCR[2]: TX and RX Stop-bit Length Select
The length of stop bit is specified by this bit in conjunction with the programmed word length.
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See
LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit-3 set to a logic 1, LCR BIT-4 selects the even or odd parity format.
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Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
Logic 0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format (default).
Logic 1 = EVEN Parity is generated by forcing an even number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format.
Table 5
for parity selection summary below.
BIT-1
BIT-2
0
0
1
1
0
1
1
LENGTH
BIT-0
5,6,7,8
W
6,7,8
0
1
0
1
ORD
5
17
S
W
TOP BIT LENGTH
(B
ORD LENGTH
5 (default)
1 (default)
IT TIME
1-1/2
6
7
8
2
(
S
))
2.97V TO 5.5V UART
ST16C1450/51

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