HYB39S256400T-10 SIEMENS [Siemens Semiconductor Group], HYB39S256400T-10 Datasheet - Page 19
HYB39S256400T-10
Manufacturer Part Number
HYB39S256400T-10
Description
256 MBit Synchronous DRAM
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.HYB39S256400T-10.pdf
(56 pages)
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Notes for AC Parameters
1. For proper power-up see the operation section of this data sheet.
2. AC timing tests for LV-TTL versions have
3. AC timing test conditions for SSTL_3 versions
Semiconductor Group
to the 1.4 V crossover point. The transition time is measured between
measurements assume
and
an input signal of 1 V/ns edge rate between 0.8 V and 2.0 V.
Figure 1
Figure 2
Termination voltage
Reverence Level of Output Signals (
Output Load
Transition Time (Rise and Fall) of Input Signals
Reference Level of Input Signals (
CLOCK
INPUT
OUTPUT
t
OH
parameters are measured with a 50 pF only, without any resistive termination and with
t
SETUP
t
HOLD
t
LZ
t
t
AC
T
= 1 ns with the AC output load circuit shown in Figure 1. Specified
1.4 V
Output
t
CL
V
REF
V
REF
t
)
t
OH
CH
t
T
)
Z
V
t
t
AC
=
HZ
IL
50
19
= 0.4 V and
2.4 V
0.4 V
SPT03404
1.4 V
256 MBit Synchronous DRAM
V
+
0.45
0.45
see Figure 2
1 ns
0.45
V
IH
tt
SPS03410
50
HYB 39S256400/800/160T
= 2.4 V with the timing referenced
30
pF
V
V
V
Measurement conditions for
I/O
CCQ
CCQ
CCQ
t
AC
V
and
IH
and
t
50 pF
OH
1998-10-01
V
IL
. All AC
t
AC
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