X28HC64DI-12 INTERSIL [Intersil Corporation], X28HC64DI-12 Datasheet - Page 2

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X28HC64DI-12

Manufacturer Part Number
X28HC64DI-12
Description
5 Volt, Byte Alterable EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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PIN DESCRIPTIONS
Addresses (A
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all
read/write operations. When CE is HIGH, power con-
sumption is reduced.
Output Enable (OE)
The Output Enable input controls the data output buff-
ers and is used to initiate read operations.
Data In/Data Out (I/O
Data is written to or read from the X28HC64 through
the I/O pins.
Write Enable (WE)
The Write Enable input controls the writing of data to
the X28HC64.
BLOCK DIAGRAM
0
-A
12
)
0
-I/O
7
2
)
A
Address
Inputs
0
–A
12
V
V
OE
WE
CE
CC
SS
Latches and
X Buffers
Logic and
Decoder
Y Buffers
Decoder
Latches
Control
Timing
and
X28HC64
PIN NAMES
Data Inputs/Outputs
and Latches
I/O Buffers
65,536-Bit
I/O
EEPROM
I/O
Symbol
A
Array
V
0
V
0
WE
CE
OE
NC
0
–I/O
-A
CC
SS
-I/O
12
7
7
Data Input/Output
Address Inputs
Output Enable
Description
Write Enable
Chip Enable
No Connect
Ground
+5V
June 1, 2005
FN8109.0

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