X28HC64DI-12 INTERSIL [Intersil Corporation], X28HC64DI-12 Datasheet - Page 7

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X28HC64DI-12

Manufacturer Part Number
X28HC64DI-12
Description
5 Volt, Byte Alterable EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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SOFTWARE DATA PROTECTION
Figure 6. Timing Sequence—Byte or Page Write
Figure 7. Write Sequence for Software
Data Protection
V
CC
WE
CE
0V
Re-Enters Data
Protected State
Write Data XX
Write Data AA
Write Data A0
Last Address
Write Data 55
Write Last
to Address
to Address
to Address
Data
ADDR
After t
Address
Byte to
to Any
0AAA
1555
1555
WC
7
1555
AAA
Byte/Page
Load Enabled
Optional
Byte/Page
Load Operation
0AAA
55
1555
A0
≤t
X28HC64
BLC MAX
Regardless of whether the device has previously been
protected or not, once the software data protection
algorithm is used, the X28HC64 will automatically dis-
able further writes unless another command is issued
to deactivate it. If no further commands are issued the
X28HC64 will be write protected during power-down
and after any subsequent power-up.
Note: Once initiated, the sequence of write operations
should not be interrupted.
Writes
Page
Byte
OK
or
t
WC
Write
Protected
(V
CC
)
June 1, 2005
FN8109.0

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