ADP2116-EVALZ AD [Analog Devices], ADP2116-EVALZ Datasheet
ADP2116-EVALZ
Related parts for ADP2116-EVALZ
ADP2116-EVALZ Summary of contents
Page 1
... The ADP2116 input voltage range is from 2. 5.5 V and can convert to a fixed output of 0.8 V, 1.2 V, 1.5 V, 1 3.3 V that can be set independently for each channel using external resistors resistor divider is used, the output voltage can be set as low as 0.6 V. The ADP2116 operates over the − ...
Page 2
... ADP2116 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Typical Application Circuit ............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. 8 Line and Load Regulation ........................................................... 9 Supply Current ............................................................................ 13 Load Transient Response ........................................................... 14 Basic Functionality ..................................................................... 15 Bode Plots .................................................................................... 18 Simplified Block Diagram ............................................................. 19 Theory of Operation ...
Page 3
... ADP2116 Unit μA nA μA μA %/V %/A kHz kHz kHz kHz kHz kHz ns ...
Page 4
... ADP2116 Parameter SYNC Pin Capacitance to GND SYNC Input Logic Low SYNC Input Logic High Phase Shift Between Channels CLKOUT Frequency CLKOUT Positive Pulse Time CLKOUT Rise or Fall Time CURRENT LIMIT Peak Output Current Limit, Channel 1 Peak Output Current Limit, Channel 2 Current-Sense Amplifier Gain ...
Page 5
... V to +3.6 V Absolute maximum ratings apply individually only, not in −0 (VDD + 0.3 V) combination. ±0.3 V ESD CAUTION ±0.3 V 34°C/W −40°C to +125°C −65°C to +150°C 260°C Rev Page ADP2116 ...
Page 6
... Channel 2. For multiphase operation, tie COMP1 and COMP2 together. 8 VDD Power Supply Input. The power source for the ADP2116 internal circuitry. Connect VDD and VINx with a 10 Ω resistor as close as possible to the ADP2116. Bypass VDD to GND with a 1 μF or greater capacitor. 9 FB2 Feedback Voltage Input for Channel 2 ...
Page 7
... V configurations, the FB1 and FB2 pins should be tied together and then connected Exposed Thermal Pad. Connect the exposed thermal pad to the signal/analog ground plane. and GND. With multiphase OUT1 Rev Page ADP2116 . For the adjustable OUT1 . OUT ...
Page 8
... ADP2116 TYPICAL PERFORMANCE CHARACTERISTICS 100 OUT V OUT 65 V OUT V OUT 60 10 100 LOAD CURRENT (mA) Figure 4. Efficiency vs. Load and 3.3 V, Inductor Cooper Bussmann DR1050-8R2-R, 8.2 μH, 15 mΩ; OUT V = 1.8 V, Inductor TOKO FDV0620-4R7M, 4.7 μH, 53 mΩ OUT 100 ...
Page 9
... Rev Page 0.25 0.20 0.15 0.10 0. 0.5 1.0 1.5 2.0 LOAD CURRENT ( 600 kHz, and 0.5 0.4 0.3 0.2 0.1 0 2.5 3.0 3.5 4.0 4.5 V (V) IN 1.00 0.75 0.50 0. 5.5V, NO LOAD 2.75V, 2A LOAD IN –50 – TEMPERATURE (°C) Figure 13. Output Voltage Error vs. Temperature, Channel 1.5 V and f = 600 kHz OUT SW ADP2116 2.5 3.0 = 25°C A 5.0 5.5 = 600 kHz SW 100 125 ...
Page 10
... ADP2116 250 f = 300kHz 600kHz SW 225 f = 1.2MHz SW 200 175 150 125 100 75 50 2.5 3.0 3.5 4.0 V (V) IN Figure 14. Minimum On Time, Open Loop, Includes Dead Time 350 f = 300kHz 600kHz 330 1.2MHz SW 310 290 270 250 230 210 190 170 150 2.5 3.0 3.5 4.0 V (V) IN Figure 15. Minimum Off Time, Open Loop, Includes Dead Time ...
Page 11
... SW 1300 1280 1260 1240 1220 1200 1180 1160 1140 1120 1100 –50 5.0 5.5 = 1.2 MHz Figure 25. Switching Frequency vs. Temperature Rev Page ADP2116 ENABLE 5.5V IN ENABLE 2.75V IN DISABLE 5.5V IN DISABLE 2.75V IN – 100 TEMPERATURE (°C) V RISING ...
Page 12
... ADP2116 120 115 110 105 OVERVOLTAGE, V RISING OUT OVERVOLTAGE, V FALLING 100 OUT UNDERVOLTAGE, V RISING OUT UNDERVOLTAGE, V FALLING OUT –50 – TEMPERATURE (°C) Figure 26. PGOOD1/PGOOD2 Threshold vs. Temperature 5. 2.75V –50 – TEMPERATURE (°C) Figure 27 ...
Page 13
... V, Channel 0 OUT1 OUT2 5.0 4.5 4.0 3.5 3.0 2.5 2 2.75V, PULSE SKIP DD 1 5.5V, PULSE SKIP 2.75V, FORCED PWM 5.5V, FORCED PWM DD 1.0 –50 – TEMPERATURE (°C) Figure 34. V Supply Current vs. Temperature, DD Channel 1.5 V, Channel 0 OUT1 OUT2 ADP2116 5.0 5.5 = 1.2 MHz SW 100 125 = 1.2 MHz SW ...
Page 14
... ADP2116 LOAD TRANSIENT RESPONSE OUT1 2 I OUT1 4 SW1, SW2 CH3 5.0V CH2 100mV M400µs 62.5MS Ω CH4 2.0A 16ns/ Figure 35. Load Transient Response in Pulse Skip Mode, Channel 1: 0 Load Step (See Table 12 for the Circuit Details) ...
Page 15
... CH3 5.0V B CH4 500mV B 20.0ns/ Figure 45. Soft Start with Precharged Output INDUCTOR CURRENT V OUT2 SW3, SW4 B CH2 1.0V M1.0ms 50MS/s A CH2 W Ω CH3 5.0V CH4 2.0A 20ns/ Figure 46. Current Limit Entry, Channel 1 Configuration, f OUT SW ADP2116 2. SS1 2.4V 1.12V = 600 kHz ...
Page 16
... Figure 49. Exiting Hiccup Mode, Channel 2: V OUT2 1.12V Figure 50. External Synchronization 600 kHz SW V OUT2 SW3, SW4 1.72A 1.12V = 1 600 kHz Figure 52. 4-Channel Operation, Two ADP2116 Devices, One Device OUT2 SW Rev Page EXTERNAL SYNC 1 CHANNEL CHANNEL CH1 5.0V M1.0µs 1.25GS/s W CH3 5 ...
Page 17
... CH3 5.0V CH4 1.0V B 40ns/pt W Figure 53. Power-Good Signal 1 4 INDUCTOR CURRENT, PHASE CH1 5.0V 2.2V Ω CH3 2.0A Figure 54. Combined Dual-Phase Output Operation, V Rev Page ADP2116 PHASE 1 SW PHASE 2 SW INDUCTOR CURRENT, PHASE 2 Ω CH2 2.0A M2.0µs A CH1 1.9V CH4 5.0V T 79. 300 kHz Load OUT SW ...
Page 18
... ADP2116 BODE PLOTS MAGNITUDE –10 –20 –30 –40 – 10k FREQUENCY (Hz – M1 FREQUENCY 56.62kHz 220.20kHz 163.58kHz MAGNITUDE 0.029dB –18.743dB –18.772dB PHASE 55.02° –0.468° –55.494° Figure 55. Magnitude and Phase vs. Frequency, V ...
Page 19
... VIN2 VIN3 GATE PMOS SW1 MOSFET SW2 WITH NMOS PGND1 PGND2 HICCUP TIMER POWER STAGE – + CURRENT-SENSE AMPLIFIER CHANNEL 1 PGOOD2 VIN4 VIN5 VIN6 GATE PMOS SW3 MOSFET SW4 WITH NMOS PGND3 PGND4 HICCUP TIMER POWER STAGE – + CURRENT-SENSE AMPLIFIER CHANNEL 2 ADP2116 ...
Page 20
... SOFT START (see Figure 1), The ADP2116 soft start feature allows the output voltage to ramp OUT2 controlled manner, eliminating output voltage overshoot during startup. Soft start begins after the undervoltage lockout threshold is exceeded and an enable pin, EN1 or EN2, is pulled high to greater than 2 ...
Page 21
... The pulse skip mode can be selected by configuring the OPCFG pin as indicated in Table 7. In pulse skip mode, when the output voltage dips below regulation, the ADP2116 enters PWM mode for a few oscillator cycles to increase A CH1 2.4V the output voltage so that it is within regulation. During the wait time between bursts, both power switches are off, and the output capacitor supplies all of the load current ...
Page 22
... ADP2116 to rise rapidly. When the junction temperature reaches approximately 150°C, the ADP2116 goes into thermal shutdown and the converter is turned off. When the junction temperature cools to less than 125°C, the ADP2116 resumes normal operation after the soft start sequence. MAXIMUM DUTY CYCLE OPERATION ...
Page 23
... GND. For the adjustable output voltage range of 1 3.3 V, tie V1SET or V2SET to VDD (see Table 4). The adjustable output voltage of the ADP2116 is externally set by a resistive voltage divider from the output voltage to the feedback pin (see Figure 63). The ratio of the resistive voltage divider sets the output voltage, whereas the absolute value of these resistors sets the divider string current ...
Page 24
... ADP2116 SETTING THE OSCILLATOR FREQUENCY The ADP2116 channels can be set to operate in one of three preset switching frequencies: 300 kHz, 600 kHz, or 1.2 MHz. For 300 kHz operation, connect the FREQ pin to GND. For 600 kHz or 1.2 MHz operation, connect a resistor between the FREQ pin and GND (see Table 5). ...
Page 25
... OPERATION MODE CONFIGURATION The dual-channel ADP2116 can be configured to one of four modes of operation by connecting the OPCFG pin as detailed in Table 7. The configuration sets the current limit for each channel and enables or disables the transition to pulse skip mode at light loads. In the dual-phase configuration, the outputs of the two channels ...
Page 26
... ESR that is low enough to mitigate the input voltage ripple. For the ADP2116, place a 22 μF, 6.3 V X5R ceramic capacitor close to the VINx pin for each channel. X5R or X7R dielectrics are recommended with a voltage rating of 6 Y5V and Z5U dielectrics are not recommended due to their poor temperature and dc bias characteristics ...
Page 27
... LOAD_MAX ΔI is the peak-to-peak inductor ripple current. L The ADP2116 can be configured in either A/2 A current-limit configuration; therefore, the current-limit thresholds for the two channels are different in each setting. The inductor chosen for each channel must have at least the peak output current limit of the IC in each case for robust operation during short-circuit conditions ...
Page 28
... R COMP COMP 0.6V GND Figure 69. Compensation Components The basic control loop block diagram is shown in Figure 70. The blocks and components shown enclosed within the dashed line in Figure 70 are embedded inside each channel of the ADP2116 INDUCTOR CURRENT SENSE PULSE- WIDTH MODULATOR V COMP ...
Page 29
... ESR SW RIPPLE L ⎛ 3 ⎜ ≅ × C ΔI ⎜ × OUT_MIN OUT_STEP ⎝ f ΔV SW DROOP = 0. ( 0.125 V ( 6.2 μF, whereas the transient load based calculation = 60 μF. To meet both requirements, use OUT ADP2116 = 0 0. ⎞ ⎟ ⎟ ⎠ ), RIPPLE ...
Page 30
... ADP2116 5. Calculate the compensation component values of the feedback loop by using the following equation: ⎛ ⎞ π f ⎜ × ⎟ ⎟ = × CROSS ⎜ COMP ⎝ ⎠ where 550 μ A/ 0.6 V. REF V = 2.5 V. OUT C = 0.8 × 69 μF (capacitance derated by 20% to account OUT for dc bias) ...
Page 31
... V ⎠ REF schematic of the ADP2116 as configured in the design example described in the Design Example section is shown in Figure 71. = 820 pF. Other configurations are shown in Figure 72 to Figure 74. An COMP application circuit of a single interleaved, dual-phase output is shown in Figure 72. The schematic in Figure 73 depicts an ...
Page 32
... SW Figure 71. Application Circuit for 3 A/3 A Outputs 10Ω 1µF PGOOD2 PGOOD1 4.7kΩ 4.7kΩ V1SET V2SET VIN1 VIN4 VIN2 VIN5 VIN3 VIN6 2.2µH ADP2116 SW1 2.2µH SW3 SW2 SW4 FB1 100µF FB2 PGND1 PGND3 PGND2 PGND4 COMP1 COMP2 15kΩ SYNC/CLKOUT 1.6nF 8.2kΩ ...
Page 33
... SW2 47µF 100µF FB1 15kΩ SS1 22kΩ 10nF 2.2nF V = 3.3V IN 100kΩ EN1 VIN1 22µF VIN2 VIN3 PGOOD1 V = 1.0V, 3A OUT1 SW1 SW2 1µH PGND1 100µF PGND2 FB1 82kΩ V1SET COMP1 SS1 33kΩ 10nF 390pF ADP2116 ...
Page 34
... The amount of transition loss is calculated by P TRAN (21) where t switching node. In the ADP2116, the rise and fall times of the switching node are in the order of 5 ns. The power dissipated by the regulator increases the die junction temperature where the temperature rise, T ...
Page 35
... In addition, ensure that the high current path from the PGNDx pin through L and C OUT ground plane is as short as possible by tying the PGNDx pins of the ADP2116 to the PGND plane as close as possible to the input and output capacitors (see Figure 76). • Connect the ADP2116 exposed pad to a large copper plane to maximize its power dissipation capability ...
Page 36
... PLANE ORDERING GUIDE Model Temperature Range 2 ADP2116ACPZ-R7 −40°C to +85°C 2 ADP2116-EVALZ 1 Operating junction temperature is −40°C to +125° RoHS Compliant Part. ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08436-0-10/09(0) 5 ...