SLB128B NSC [National Semiconductor], SLB128B Datasheet - Page 13

• Manufacturer Part Number: SLB128B
• Description: Transmitter with built-in scaler for LVDS Display Interface (LDI)
• Manufacturer: NSC [National Semiconductor]

OPTION SELECTION
BAL
DUAL
COLOR
A0, A1, A2
EDGE
PANEL INTERFACE
A0P, A1P,
A2P, A3P
A0M, A1M,
A2M, A3M
A4P, A5P,
A6P, A7P
DS90C2501 Pin Description
Pin Name
115, 116,
Pin No.
55, 53,
56, 54,
45, 43,
51, 47
52, 48
41, 39
117
97
35
34
36
I-LVTTL 2.5
I-LVTTL 2.5
I-LVTTL 2.5
I-LVTTL 2.5
I-LVTTL 2.5
I/O Type
O-LVDS
O-LVDS
O-LVDS
(Continued)
Tie this pin to GND.
LVTTL level input.
Input = GND for single pixel in-to-single pixel out mode. LVDS output
channels A0 to A3 are enabled, A4 to A7 are CLK2 are disable.
Input = V
to A7, CLK1 and CLK2 are enable. Use a 10K typ. pull-up resistor.
Input =
A0 to A7, CLK1 and CLK2 are enabled. See register CFG1 (08h) BPASS field
for more information.
See Figure 11 for example interface circuit.
LVTTL level input to select RGB to LVDS color mapping.
Tie to GND for 18-bit/36-bit LCD.
Tie to GND to select conventional color mapping for 24-bit/48-bit LCD.
Tie to Logic “1” to select non-conventional color mapping for 24-bit/48-bit
LCD.
These are input pins to select the 2-wire Serial Communication Slave Device
Address Lower Bits.
Selects primary clock edge E1.
Tie to Logic “1” to select Rising edge for E1.
Tie to ground to select Falling edge for E1.
Positive LVDS differential data output.
When DUAL pin = GND, input to D0–D11 will be coming out of A0P to A3P.
For 6-bit color application, no connect for channel A3P.
When DUAL pin =
of A0P to A3P, and the second pixel going in D0–D11 will come out of A4P to
A7P. For 6-bit color application, no connect for channels A3P and A7P.
When DUAL pin = V
A0P to A3P, the second pixel going in D12–D23 will be coming out of A4P to
A7P. For 6-bit color application, no connect for channels A3P and A7P.
Negative LVDS differential data output.
When DUAL pin = GND, input to D0–D11 will be coming out of A0M to A3M.
For 6-bit color application, no connect for channel A3M.
When DUAL pin =
of A0M to A3M, and the second pixel going in D0–D11 will come out of A4M
to A7M. For 6-bit color application, no connect for channels A3M and A7M.
When DUAL pin = V
A0M to A3M, the second pixel going in D12–D23 will be coming out of A4M
to A7M. For 6-bit color application, no connect for channels A3M and A7M.
Positive LVDS differential data output for second pixel.
When DUAL pin = GND, input to D0–D11 will be coming out of A0P to A3P.
For 6-bit color application, no connect for channel A3P.
When DUAL pin =
of A0P to A3P, and the second pixel going in D0–D11 will come out of A4P to
A7P. For 6-bit color application, no connect for channels A3P and A7P.
When DUAL pin = V
A0P to A3P, the second pixel going in D12–D23 will be coming out of A4P to
A7P. For 6-bit color application, no connect for channels A3P and A7P.
1
⁄
2
CC
V
CC
for dual pixel in-to-dual pixel out mode. LVDS output channel A0
13
for single pixel in-to-dual pixel out mode. LVDS output channel
1
1
1
⁄
⁄
⁄
2
2
2
CC
CC
CC
V
V
V
CC
CC
CC
, the first pixel going in D0–D11 will be coming out of
, the first pixel going in D0–D11 will be coming out of
, the first pixel going in D0–D11 will be coming out of
, the first pixel going in D0–D11 will be coming out
, the first pixel going in D0–D11 will be coming out
, the first pixel going in D0–D11 will be coming out
Description
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