SLB128B NSC [National Semiconductor], SLB128B Datasheet - Page 19

• Manufacturer Part Number: SLB128B
• Description: Transmitter with built-in scaler for LVDS Display Interface (LDI)
• Manufacturer: NSC [National Semiconductor]

Host Control Register Descriptions
Register Name: CFG1
Address Offset: 08h
Default Value:
Access Method: R/W
Bit
0
1
2
3
4
5
7:6
Description
Soft Power Down; 0 = Power Down, 1 = Normal Operation
Reserved
BPASS (1 = bypass, 0 = non-bypass)
This field is valid only when DUAL pin is 0V or
can be achieved in bypass mode.
DSEL
0= Input clock is differential (recommended for clocks above 65 MHz),
1= input clock is single-ended
HEN (HSYNC enable)
0= HSYNC is transmitted as a fixed low,
1= HSYNC is same as input
VEN (VSYNC enable)
0= VSYNC is transmitted as a fixed low,
1= VSYNC is same as input
Reserved
39h
1
⁄
2
V
(Continued)
CC
19
. Note: When image scaling is not required power savings
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