AT91SAM7SE256 ATMEL [ATMEL Corporation], AT91SAM7SE256 Datasheet - Page 16

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AT91SAM7SE256

Manufacturer Part Number
AT91SAM7SE256
Description
Product Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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6.5
6.6
6.7
16
SDCK Pin
PIO Controller lines
I/O Lines Current Drawing
AT91SAM7SE512/256/32 Preliminary
The SDCK pin is dedicated to the SDRAM Clock and is an output-only without pull-up. Maximum
Output Frequency of this pad is 48 MHz at 3.0V and 25 MHz at 1.65V with a maximum load of
30 pF.
All the I/O lines PA0 to PA31, PB0 to PB31, PC0 to PC23 integrate a programmable pull-up
resistor. Programming of this pull-up resistor is performed independently for each I/O line
through the PIO controllers.
Typical pull-up value is 100 kΩ.
All the I/O lines have schmitt trigger inputs.
The PIO lines PA0 to PA3 are high-drive current capable. Each of these I/O lines can drive up to
16 mA permanently.
The remaining I/O lines can draw only 8 mA.
However, the total current drawn by all the I/O lines cannot exceed 300 mA.
6222ES–ATARM–15-Dec-09

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