AT91SAM7SE256 ATMEL [ATMEL Corporation], AT91SAM7SE256 Datasheet - Page 31

• Manufacturer Part Number: AT91SAM7SE256
• Description: Product Description
• Manufacturer: ATMEL [ATMEL Corporation]

9.3
6222ES–ATARM–15-Dec-09
Power Management Controller
It provides SLCK, MAINCK and PLLCK.
Figure 9-2.
The Power Management Controller uses the Clock Generator outputs to provide:
The Master Clock (MCK) is programmable from a few hundred Hz to the maximum operating fre-
quency of the device.
The Processor Clock (PCK) switches off when entering processor idle mode, thus allowing
reduced power consumption while waiting for an interrupt.
• Main Oscillator frequency ranges between 3 and 20 MHz
• Main Oscillator can be bypassed
• PLL output ranges between 80 and 220 MHz
• the Processor Clock PCK
• the Master Clock MCK
• the USB Clock UDPCK
• all the peripheral clocks, independently controllable
• three programmable clock outputs
AT91SAM7SE512/256/32 Preliminary Summary
Clock Generator Block Diagram
PLLRC
XOUT
XIN
Clock Generator
Management
Embedded
Status
Controller
Oscillator
Oscillator
PLL and
Divider
Power
Main
RC
Control
Slow Clock
SLCK
Main Clock
MAINCK
PLL Clock
PLLCK
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