DSPIC30F6012 MICROCHIP [Microchip Technology], DSPIC30F6012 Datasheet - Page 143
DSPIC30F6012
Manufacturer Part Number
DSPIC30F6012
Description
High-Performance, 16-Bit Digital Signal Controllers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.DSPIC30F6012.pdf
(228 pages)
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19.8
The analog input model of the 12-bit A/D converter
is shown inFigure 19-4. The total sampling time for the
A/D is a function of the internal amplifier settling time
and the holding capacitor charge time.
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the voltage level on the analog input
pin. The source impedance (R
impedance (R
(R
FIGURE 19-4:
© 2006 Microchip Technology Inc.
SS
) impedance combine to directly affect the time
A/D Acquisition Requirements
Note: C
IC
), and the internal sampling switch
Legend: C
VA
PIN
Rs
value depends on device package and is not tested. Effect of C
12-BIT A/D CONVERTER ANALOG INPUT MODEL
V
I leakage
R
R
C
ANx
PIN
T
IC
SS
HOLD
C
PIN
HOLD
S
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch resistance
= sample/hold capacitance (from DAC)
), the interconnect
various junctions
) must be allowed
dsPIC30F6011/6012/6013/6014
V
DD
V
V
T
T
= 0.6V
= 0.6V
R
I leakage
IC
500 nA
250
required to charge the capacitor C
impedance of the analog sources must therefore be
small enough to fully charge the holding capacitor
within the chosen sample time. To minimize the effects
of pin leakage currents on the accuracy of the A/D con-
verter, the maximum recommended source imped-
ance, R
selected (changed), this sampling function must be
completed prior to starting the conversion. The internal
holding capacitor will be in a discharged state prior to
each sample operation.
Sampling
Switch
S
, is 2.5 k . After the analog input channel is
R
SS
PIN
R
negligible if Rs
SS
V
SS
C
= DAC capacitance
= 18 pF
HOLD
3 k
HOLD
2.5 k .
DS70117F-page 141
. The combined