DSPIC30F6012 MICROCHIP [Microchip Technology], DSPIC30F6012 Datasheet - Page 21

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DSPIC30F6012

Manufacturer Part Number
DSPIC30F6012
Description
High-Performance, 16-Bit Digital Signal Controllers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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2.4
The DSP engine consists of a high-speed 17-bit x
17-bit multiplier, a barrel shifter and a 40-bit adder/
subtracter (with two target accumulators, round and
saturation logic).
The dsPIC30F is a single-cycle instruction flow archi-
tecture, therefore, concurrent operation of the DSP
engine with MCU instruction flow is not possible.
However, some MCU ALU and DSP engine resources
may be used concurrently by the same instruction (e.g.,
ED, EDAC).
The DSP engine also has the capability to perform
inherent
which require no additional data. These instructions are
ADD, SUB and NEG.
TABLE 2-2:
© 2006 Microchip Technology Inc.
CLR
ED
EDAC
MAC
MAC
MOVSAC
MPY
MPY.N
MSC
DSP Engine
Instruction
accumulator-to-accumulator
DSP INSTRUCTIONS SUMMARY
dsPIC30F6011/6012/6013/6014
operations,
Algebraic Operation
A = 0
A = (x – y)
A = A + (x – y)
A = A + (x * y)
A = A + x
No change in A
A = x * y
A = – x * y
A = A – x * y
2
The DSP engine has various options selected through
various bits in the CPU Core Configuration register
(CORCON), as listed below:
1.
2.
3.
4.
5.
6.
7.
A block diagram of the DSP engine is shown in
Figure 2-2.
2
Note:
2
Fractional or integer DSP multiply (IF).
Signed or unsigned DSP multiply (US).
Conventional or convergent rounding (RND).
Automatic saturation on/off for ACCA (SATA).
Automatic saturation on/off for ACCB (SATB).
Automatic saturation on/off for writes to data
memory (SATDW).
Accumulator
(ACCSAT).
For CORCON layout, see Table 3-3.
Saturation
mode
ACC WB?
DS70117F-page 19
Yes
Yes
Yes
Yes
No
No
No
No
No
selection

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