LPC1776 NXP [NXP Semiconductors], LPC1776 Datasheet - Page 82

• Manufacturer Part Number: LPC1776
• Description: 32-bit ARM Cortex-M3 microcontroller
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 15.
C
[1]
[2]
[3]
[4]
[5]
LPC178X_7X
Objective data sheet
Symbol
t
t
t
BLSLBLSH
BLSHEOW
BLSHDNV
Fig 16. External static memory read/write access (PB = 0)
L
= 30 pF, T
Parameters are shown as RD
Parameters specified for 40 % of V
Latest of address valid, CS LOW, OE LOW, BS LOW (PB = 1).
After End Of Read (EOR): Earliest of CS HIGH, OE HIGH, BLSx HIGH (PB = 1), address invalid.
End Of Write (EOW): Earliest of address invalid, CS HIGH, BLSx HIGH (PB = 1).
BLSx
WE
OE
CS
Dynamic characteristics: Static external memory interface
Parameter
BLS LOW to BLS HIGH time WR
BLS HIGH to end of write
time
BLS HIGH to data invalid
time
A
D
amb
=

40

[1]
C to 85
n

or WD
C, V
RD
RD
DD(IO)
2
DD(REG)(3V3)
n
1
RD
in
for rising edges and 60 % of V
Figure 16
5
Conditions
WR
WR12;
PB = 0
All information provided in this document is subject to legal disclaimers.
RD
10
11
RD
; PB = 0
; PB = 0
5
RD
= 3.0 V to 3.6 V. Values guaranteed by design.
5
as indicated in the Conditions column.
4
Rev. 2 — 27 May 2011
[1]
[5]
EOR
Min
(WAITWR 
WAITWEN + 1) 
T
<tbd>
<tbd>
cy(clk)
RD
RD
6
7
DD(IO)
+ <tbd>
WR
WR
for falling edges.
2
…continued
9
32-bit ARM Cortex-M3 microcontroller
WR
Typ
(WAITWR 
WAITWEN + 1) 
T
<tbd>
<tbd>
WR
cy(clk)
1
10
+ <tbd>
WR
12
WR
11
LPC178x/7x
Max
(WAITWR 
WAITWEN + 1) 
T
<tbd>
<tbd>
EOW
cy(clk)
© NXP B.V. 2011. All rights reserved.
WR
+ <tbd>
002aag214
8
82 of 117
Unit
ns
ns
ns