STR910FAZ32H6T STMICROELECTRONICS [STMicroelectronics], STR910FAZ32H6T Datasheet - Page 20

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STR910FAZ32H6T

Manufacturer Part Number
STR910FAZ32H6T
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Functional overview
Table 7.
3.10
3.10.1
20/99
31 (low priority)
IRQ Channel
hardware
priority
29
30
VIC IRQ Channels (continued)
Clock control unit (CCU)
The CCU generates a master clock of frequency f
also generates individually scaled and gated clock sources to each of the following
functional blocks within the STR91xFA.
Master clock sources
The master clock in the CCU (f
firmware control, the CPU can switch between the three CCU inputs without introducing any
glitches on the master clock output. Inputs to the CCU are:
As an option, there are a number of peripherals that do not have to receive a clock sourced
from the CCU. The USB interface can receive an external clock on pin P2.7, TIM timers
TIM0/ TIM1 can receive an external clock on pin P2.4, and timers TIM2/TIM3 on pin P2.5.
VIC input
channel
VIC1.13
VIC1.14
VIC1.15
CPU, f
Advanced High-performance Bus (AHB), f
Advanced Peripheral Bus (APB), f
Flash Memory Interface (FMI), f
External Memory Interface (EMI), f
UART Baud Rate Generators, f
USB, f
Main Oscillator (f
crystal connected to STR91xFA pins X1_CPU and X2_CPU, or an external oscillator
device connected to pin X1_CPU.
PLL (f
master clock output up to 96 MHz (programmable). By default, at power-up the master
clock is sourced from the main oscillator until the PLL is ready (locked) and then the
CPU may switch to the PLL source under firmware control. The CPU can switch back to
the main oscillator source at any time and turn off the PLL for low-power operation. The
PLL is always turned off in Sleep mode.
RTC (f
X2_RTC, or an external oscillator connected to pin X1_RTC to constantly run the real-
time clock unit. This 32.768 kHz clock source can also be used as an input to the CCU
to run the CPU in slow clock mode for reduced power.
PLL
USB
CPUCLK
RTC
). The PLL takes the 4 to 25 MHz oscillator clock as input and generates a
Wake-up Group 3
). A 32.768 kHz external crystal can be connected to pins X1_RTC and
Logic Block
PFQ-BC
USB
OSC
). The source for the main oscillator input is a 4 to 25 MHz external
MSTR
Special use of interrupts from Prefetch Queue and Branch Cache
) is derived from one of three clock input sources. Under
BAUD
FMICLK
USB Bus Resume Wake-up (also input to wake-up unit)
PCLK
BCLK
Logic OR of 8 interrupts from pins P7.0 to P7.7
STR91xFAx32 STR91xFAx42 STR91xFAx44
HCLK
MSTR
Interrupt Source
. From this master clock the CCU

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