MCF5481 FREESCALE [Freescale Semiconductor, Inc], MCF5481 Datasheet - Page 3

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MCF5481

Manufacturer Part Number
MCF5481
Description
Microprocessor Electrical Characteristics
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Table 4
EV
Freescale Semiconductor
NOTES:
1
2
DD
External (I/O pads) operation voltage range
Memory (I/O pads) operation voltage range (DDR Memory)
Internal logic operation voltage range
PLL Analog operation voltage range
USB oscillator operation voltage range
USB digital logic operation voltage range
USB PHY operation voltage range
USB oscillator analog operation voltage range
USB PLL operation voltage range
Input high voltage SSTL 3.3V (SDR DRAM)
Input low voltage SSTL 3.3V (SDR DRAM)
Input high voltage SSTL 2.5V (DDR DRAM)
Input low voltage SSTL 2.5V (DDR DRAM)
Output high voltage I
Output low voltage I
Capacitance
NOTES:
1
2
3
4
5
IV
example circuit. Note: There are three PLL V
Capacitance C
θ
Freescale recommends the use of θ
junction temperatures from exceeding the rated specification. System designers should be aware that device
junction temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the
device junction temperature specification can be verified by physical measurement in the customer’s system using
the Ψ
Per JEDEC JESD51-6 with the board horizontal.
Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is
measured on the top surface of the board near the package.
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL
SPEC-883 Method 1012.1).
Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter
is written as Psi-JT.
= 3.3 V
DD
JA
lists DC electrical operating temperatures. This table is based on an operating voltage of
and Ψ
DC Electrical Specifications
and PLL V
jt
parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
DC
2
jt
, V
parameters are simulated in accordance with EIA/JESD Standard 51-2 for natural convection.
in
IN
± 0.3 V
DD
= 0 V, f = 1 MHz
is periodically sampled rather than 100% tested.
OL
OH
MCF548x Integrated Microprocessor Electrical Characteristics, Rev. 2.1
should be at the same voltage. PLL V
= 8 mA, 16 mA,24 mA
= 8 mA, 16 mA,24 mA
DC
Characteristic
and IV
1
Table 4. DC Electrical Specifications
1
DD
JA
and power dissipation specifications in the system design to prevent device
of 1.5 ± 0.07 V
5
DD
inputs. A filter circuit should used on each PLL V
DD
DC
should have a filtered input. Please see
.
USB_OSCAV
USB_PHYV
USB_PLLV
USB_OSV
PLL V
USBV
Symbol
SD V
EV
IV
V
V
C
V
V
V
V
OH
OL
DD
IH
IH
IN
IL
IL
DD
DD
DD
DD
DD
DD
DD
DD
2.30
1.43
1.43
1.43
1.43
–0.5
–0.5
Min
3.0
3.0
3.0
3.0
2.0
2.0
2.4
DC Electrical Specifications
DD
TBD
Max
2.70
1.58
1.58
1.58
1.58
3.6
3.6
3.6
3.6
3.6
0.8
2.8
0.8
0.5
input.
Figure 1
Units
for an
pF
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
3

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